From 0e43dd23aee44cc20edce0efc9fa79652c1e1455 Mon Sep 17 00:00:00 2001 From: Dan Collins Date: Tue, 24 Sep 2024 15:47:45 +1200 Subject: [PATCH] soc: st: adds support for stm32u545xx This adds support for the stm32u545xx SoC, which extends the stm32u5 family already present in Zephyr. Signed-off-by: Dan Collins --- dts/arm/st/u5/stm32u545.dtsi | 35 +++++++++++++++++++ dts/arm/st/u5/stm32u545Xi.dtsi | 27 ++++++++++++++ soc/st/stm32/soc.yml | 1 + .../stm32u5x/Kconfig.defconfig.stm32u545xx | 11 ++++++ soc/st/stm32/stm32u5x/Kconfig.soc | 5 +++ soc/st/stm32/stm32u5x/soc.c | 5 +++ 6 files changed, 84 insertions(+) create mode 100644 dts/arm/st/u5/stm32u545.dtsi create mode 100644 dts/arm/st/u5/stm32u545Xi.dtsi create mode 100644 soc/st/stm32/stm32u5x/Kconfig.defconfig.stm32u545xx diff --git a/dts/arm/st/u5/stm32u545.dtsi b/dts/arm/st/u5/stm32u545.dtsi new file mode 100644 index 00000000000000..d671688fed0852 --- /dev/null +++ b/dts/arm/st/u5/stm32u545.dtsi @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2024 Opito + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + + +/ { + soc { + /* USB-C PD is not available on this part. */ + /delete-node/ ucpd@4000dc00; + + compatible = "st,stm32u545", "st,stm32u5", "simple-bus"; + + usb: usb@40006000 { + compatible = "st,stm32-usb"; + reg = <0x40006000 0x400>; + interrupts = <73 0>; + interrupt-names = "usb"; + num-bidir-endpoints = <8>; + ram-size = <1024>; + status = "disabled"; + clocks = <&rcc STM32_CLOCK_BUS_APB2 0x01000000>, + <&rcc STM32_SRC_HSI48 ICKLK_SEL(0)>; + phys = <&usb_fs_phy>; + }; + }; + + usb_fs_phy: usb_fs_phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; +}; diff --git a/dts/arm/st/u5/stm32u545Xi.dtsi b/dts/arm/st/u5/stm32u545Xi.dtsi new file mode 100644 index 00000000000000..52f2bf0c4c543a --- /dev/null +++ b/dts/arm/st/u5/stm32u545Xi.dtsi @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2024 Opito + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include +#include + +/ { + sram0: memory@20000000 { + /* SRAM1 + SRAM2 */ + reg = <0x20000000 DT_SIZE_K(256)>; + }; + + sram1: memory@28000000 { + /* SRAM4, low-power background autonomous mode */ + reg = <0x28000000 DT_SIZE_K(16)>; + }; + + soc { + flash-controller@40022000 { + flash0: flash@8000000 { + reg = <0x08000000 DT_SIZE_K(512)>; + }; + }; + }; +}; diff --git a/soc/st/stm32/soc.yml b/soc/st/stm32/soc.yml index f1c625a156952f..9ef503be86eca9 100644 --- a/soc/st/stm32/soc.yml +++ b/soc/st/stm32/soc.yml @@ -190,6 +190,7 @@ family: socs: - name: stm32u5a5xx - name: stm32u5a9xx + - name: stm32u545xx - name: stm32u575xx - name: stm32u585xx - name: stm32u595xx diff --git a/soc/st/stm32/stm32u5x/Kconfig.defconfig.stm32u545xx b/soc/st/stm32/stm32u5x/Kconfig.defconfig.stm32u545xx new file mode 100644 index 00000000000000..bca91b9b505db0 --- /dev/null +++ b/soc/st/stm32/stm32u5x/Kconfig.defconfig.stm32u545xx @@ -0,0 +1,11 @@ +# ST Microelectronics STM32U545XX MCU + +# Copyright (c) 2024 Opito +# SPDX-License-Identifier: Apache-2.0 + +if SOC_STM32U545XX + +config NUM_IRQS + default 126 + +endif # SOC_STM32U545XX diff --git a/soc/st/stm32/stm32u5x/Kconfig.soc b/soc/st/stm32/stm32u5x/Kconfig.soc index 59324d5619355d..b3360e9ac10d7c 100644 --- a/soc/st/stm32/stm32u5x/Kconfig.soc +++ b/soc/st/stm32/stm32u5x/Kconfig.soc @@ -12,6 +12,10 @@ config SOC_SERIES_STM32U5X config SOC_SERIES default "stm32u5x" if SOC_SERIES_STM32U5X +config SOC_STM32U545XX + bool + select SOC_SERIES_STM32U5X + config SOC_STM32U575XX bool select SOC_SERIES_STM32U5X @@ -39,6 +43,7 @@ config SOC_STM32U5A9XX config SOC default "stm32u5a5xx" if SOC_STM32U5A5XX default "stm32u5a9xx" if SOC_STM32U5A9XX + default "stm32u545xx" if SOC_STM32U545XX default "stm32u575xx" if SOC_STM32U575XX default "stm32u585xx" if SOC_STM32U585XX default "stm32u595xx" if SOC_STM32U595XX diff --git a/soc/st/stm32/stm32u5x/soc.c b/soc/st/stm32/stm32u5x/soc.c index b37acbe50144a7..131279dabae40d 100644 --- a/soc/st/stm32/stm32u5x/soc.c +++ b/soc/st/stm32/stm32u5x/soc.c @@ -40,11 +40,16 @@ void soc_early_init_hook(void) /* Enable PWR */ LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_PWR); + /* For devices with USB C PD, we can disable the dead battery + * pull-down behaviour. + */ +#if defined(UCPD1) if (IS_ENABLED(CONFIG_DT_HAS_ST_STM32_UCPD_ENABLED) || !IS_ENABLED(CONFIG_USB_DEVICE_DRIVER)) { /* Disable USB Type-C dead battery pull-down behavior */ LL_PWR_DisableUCPDDeadBattery(); } +#endif /* Power Configuration */ #if defined(CONFIG_POWER_SUPPLY_DIRECT_SMPS)