From 3b6409e34e52596317b5489a68f7c40d2d2d7f5b Mon Sep 17 00:00:00 2001
From: Ethan Duckett <ethan.duckett@brillpower.com>
Date: Fri, 23 Jun 2023 14:22:26 +0100
Subject: [PATCH] dts: stm32g4: fix clk-lse driving-capability

Altered LSE in stm32g4.dtsi to same value as other ST DTS files.

Signed-off-by: Ethan Duckett <ethan.duckett@brillpower.com>
---
 dts/arm/st/g4/stm32g4.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/dts/arm/st/g4/stm32g4.dtsi b/dts/arm/st/g4/stm32g4.dtsi
index f08b4c2c012605..e3dccb86db8bcd 100644
--- a/dts/arm/st/g4/stm32g4.dtsi
+++ b/dts/arm/st/g4/stm32g4.dtsi
@@ -62,8 +62,9 @@
 
 		clk_lse: clk-lse {
 			#clock-cells = <0>;
-			compatible = "fixed-clock";
+			compatible = "st,stm32-lse-clock";
 			clock-frequency = <32768>;
+			driving-capability = <0>;
 			status = "disabled";
 		};