From 902206db4b6c6cd687f8850d4bda5708df90bde3 Mon Sep 17 00:00:00 2001 From: Radoslaw Koppel Date: Wed, 26 Jul 2023 16:52:21 +0200 Subject: [PATCH] build_system: Cleanup access to ".intList" section MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change the way ".intList" section is handled by the build system. Now it is marked as INFO section - it would not be available as an output and does not need to be placed in any memory segment. It cannot by accessed by objcopy, but can be accessed by elftools instead. The used (INFO) section type background: INFO section was introduced with binutils 2.7 (Jun 1996). It was made backward compatible (not deprecated) with binutils 2.10 (May 2000), but no alternative was provided since then. INFO section type was used by binutils itself in >> https://gnu.googlesource.com/binutils-gdb/+/6752dd75f76457902729a5f03d09fa28ec5d68c3 dated at March 2023. With binutils >=2.39, there seems to be introduced an alternative with: ``TYPE = type``: >> https://sourceware.org/binutils/docs/ld/Output-Section-Type.html Proposal was made to use (INFO) section solution and follow binutils releases to migrate when there is a good alternative. Signed-off-by: Radosław Koppel Signed-off-by: Torsten Rasmussen --- CMakeLists.txt | 11 +--------- arch/common/CMakeLists.txt | 5 +---- boards/x86/qemu_x86/qemu_x86_tiny.ld | 14 ++----------- cmake/linker_script/arm/linker.cmake | 1 - include/zephyr/arch/arc/v2/linker.ld | 2 -- .../arm/aarch32/cortex_a_r/scripts/linker.ld | 2 -- .../arm/aarch32/cortex_m/scripts/linker.ld | 2 -- include/zephyr/arch/arm64/scripts/linker.ld | 2 -- include/zephyr/arch/mips/linker.ld | 2 -- include/zephyr/arch/nios2/linker.ld | 6 ------ include/zephyr/arch/riscv/common/linker.ld | 3 --- include/zephyr/arch/x86/ia32/linker.ld | 12 +---------- include/zephyr/arch/x86/memory.ld | 11 ---------- include/zephyr/linker/intlist.ld | 21 +------------------ scripts/build/gen_isr_tables.py | 13 ++++++------ soc/arm64/nxp_imx/mimx9/linker.ld | 2 -- soc/riscv/espressif_esp32/esp32c3/default.ld | 4 ---- soc/riscv/espressif_esp32/esp32c3/mcuboot.ld | 4 ---- soc/riscv/openisa_rv32m1/linker.ld | 5 ----- soc/riscv/riscv-ite/it8xxx2/linker.ld | 3 --- .../riscv-privileged/andes_v5/ae350/linker.ld | 3 --- soc/sparc/gr716a/linker.ld | 2 -- soc/sparc/leon3/linker.ld | 2 -- soc/xtensa/espressif_esp32/esp32/default.ld | 3 --- soc/xtensa/espressif_esp32/esp32/mcuboot.ld | 4 ---- .../espressif_esp32/esp32_net/linker.ld | 3 --- soc/xtensa/espressif_esp32/esp32s2/default.ld | 3 --- soc/xtensa/espressif_esp32/esp32s2/mcuboot.ld | 5 ----- soc/xtensa/espressif_esp32/esp32s3/default.ld | 4 ---- soc/xtensa/espressif_esp32/esp32s3/mcuboot.ld | 4 ---- soc/xtensa/intel_adsp/ace/ace-link.ld | 9 -------- .../cavs/include/xtensa-cavs-linker.ld | 9 -------- soc/xtensa/nxp_adsp/imx8/linker.ld | 5 ----- soc/xtensa/nxp_adsp/imx8m/linker.ld | 5 ----- .../include/xtensa-sample-controller.ld | 3 --- 35 files changed, 13 insertions(+), 176 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 0f03c70eb24327e..0679bd1e6c29284 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -1242,20 +1242,11 @@ if(CONFIG_GEN_ISR_TABLES) # isr_tables.c is generated from ${ZEPHYR_LINK_STAGE_EXECUTABLE} by # gen_isr_tables.py add_custom_command( - OUTPUT isr_tables.c isrList.bin - COMMAND $ - $ - $${OUTPUT_FORMAT} - $binary - $.intList - $$ - $isrList.bin - $ + OUTPUT isr_tables.c COMMAND ${PYTHON_EXECUTABLE} ${ZEPHYR_BASE}/scripts/build/gen_isr_tables.py --output-source isr_tables.c --kernel $ - --intlist isrList.bin $<$:--big-endian> $<$:--debug> ${GEN_ISR_TABLE_EXTRA_ARG} diff --git a/arch/common/CMakeLists.txt b/arch/common/CMakeLists.txt index 21ddbd24ea4926c..bd7556e11fb19d2 100644 --- a/arch/common/CMakeLists.txt +++ b/arch/common/CMakeLists.txt @@ -31,12 +31,9 @@ zephyr_linker_sources_ifdef(CONFIG_GEN_IRQ_VECTOR_TABLE ) if(CONFIG_GEN_ISR_TABLES) - zephyr_linker_section(NAME .intList VMA IDT_LIST LMA IDT_LIST NOINPUT PASS NOT LINKER_ZEPHYR_FINAL) + zephyr_linker_section(NAME .intList NOINPUT TYPE (INFO)) zephyr_linker_section_configure(SECTION .intList KEEP INPUT ".irq_info" FIRST) zephyr_linker_section_configure(SECTION .intList KEEP INPUT ".intList") - - zephyr_linker_section_configure(SECTION /DISCARD/ KEEP INPUT ".irq_info" PASS LINKER_ZEPHYR_FINAL) - zephyr_linker_section_configure(SECTION /DISCARD/ KEEP INPUT ".intList" PASS LINKER_ZEPHYR_FINAL) endif() zephyr_linker_sources_ifdef(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT diff --git a/boards/x86/qemu_x86/qemu_x86_tiny.ld b/boards/x86/qemu_x86/qemu_x86_tiny.ld index c53e2a7b409804f..b07a4c4a76cb927 100644 --- a/boards/x86/qemu_x86/qemu_x86_tiny.ld +++ b/boards/x86/qemu_x86/qemu_x86_tiny.ld @@ -63,16 +63,6 @@ MEMORY #if defined(CONFIG_DEMAND_PAGING) && !defined(CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT) FLASH (rw) : ORIGIN = FLASH_ROM_ADDR, LENGTH = FLASH_ROM_SIZE #endif - - /* - * On 32-bit x86, fake memory area for build-time IDT generation data. - * - * It doesn't matter where this region goes as it is stripped from the - * final ELF image. The address doesn't even have to be valid on the - * target. However, it shouldn't overlap any other regions. - */ - - IDT_LIST : ORIGIN = 0xFFFF1000, LENGTH = 2K } #if defined(Z_VM_KERNEL) @@ -794,13 +784,13 @@ SECTIONS #ifndef LINKER_ZEPHYR_FINAL /* static interrupts */ - SECTION_PROLOGUE(intList,,) + SECTION_PROLOGUE(intList, 0 (INFO),) { KEEP(*(.spurIsr)) KEEP(*(.spurNoErrIsr)) KEEP(*(.intList)) KEEP(*(.gnu.linkonce.intList.*)) - } > IDT_LIST + } #else /DISCARD/ : { diff --git a/cmake/linker_script/arm/linker.cmake b/cmake/linker_script/arm/linker.cmake index 15a2ebd1130e35d..0bade8d2aa65a10 100644 --- a/cmake/linker_script/arm/linker.cmake +++ b/cmake/linker_script/arm/linker.cmake @@ -32,7 +32,6 @@ zephyr_linker(ENTRY ${CONFIG_KERNEL_ENTRY}) zephyr_linker_memory(NAME FLASH FLAGS rx START ${FLASH_ADDR} SIZE ${FLASH_SIZE}) zephyr_linker_memory(NAME RAM FLAGS wx START ${RAM_ADDR} SIZE ${RAM_SIZE}) -zephyr_linker_memory(NAME IDT_LIST FLAGS wx START ${IDT_ADDR} SIZE 2K) # Only use 'rw' as FLAGS. It's not used anyway. dt_comp_path(paths COMPATIBLE "zephyr,memory-region") diff --git a/include/zephyr/arch/arc/v2/linker.ld b/include/zephyr/arch/arc/v2/linker.ld index a7751d961194e64..6a30f57c0f9b9e1 100644 --- a/include/zephyr/arch/arc/v2/linker.ld +++ b/include/zephyr/arch/arc/v2/linker.ld @@ -73,8 +73,6 @@ MEMORY { #ifdef YCCM_START YCCM (rw) : ORIGIN = YCCM_START, LENGTH = YCCM_SIZE #endif - /* Used by and documented in include/linker/intlist.ld */ - IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } SECTIONS { diff --git a/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld b/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld index a27dd55a8cf29ae..b9be66e42dc4e40 100644 --- a/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld +++ b/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld @@ -80,8 +80,6 @@ MEMORY FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE RAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE LINKER_DT_REGIONS() - /* Used by and documented in include/linker/intlist.ld */ - IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } ENTRY(CONFIG_KERNEL_ENTRY) diff --git a/include/zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld b/include/zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld index b170b514a9cea6a..0e797eca906871e 100644 --- a/include/zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld +++ b/include/zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld @@ -80,8 +80,6 @@ MEMORY FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE RAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE LINKER_DT_REGIONS() - /* Used by and documented in include/linker/intlist.ld */ - IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } ENTRY(CONFIG_KERNEL_ENTRY) diff --git a/include/zephyr/arch/arm64/scripts/linker.ld b/include/zephyr/arch/arm64/scripts/linker.ld index fa08b7303047853..746d9c8c33a610d 100644 --- a/include/zephyr/arch/arm64/scripts/linker.ld +++ b/include/zephyr/arch/arm64/scripts/linker.ld @@ -60,8 +60,6 @@ MEMORY { FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE RAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE - /* Used by and documented in include/linker/intlist.ld */ - IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } ENTRY(CONFIG_KERNEL_ENTRY) diff --git a/include/zephyr/arch/mips/linker.ld b/include/zephyr/arch/mips/linker.ld index cbff890822c7236..c27b77498c19571 100644 --- a/include/zephyr/arch/mips/linker.ld +++ b/include/zephyr/arch/mips/linker.ld @@ -25,8 +25,6 @@ MEMORY { RAM (rwx) : ORIGIN = CONFIG_SRAM_BASE_ADDRESS, LENGTH = KB(CONFIG_SRAM_SIZE) - /* Used by and documented in include/linker/intlist.ld */ - IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } REGION_ALIAS("REGION_TEXT", RAM); diff --git a/include/zephyr/arch/nios2/linker.ld b/include/zephyr/arch/nios2/linker.ld index 6958533eaf6b536..6c313dab425de13 100644 --- a/include/zephyr/arch/nios2/linker.ld +++ b/include/zephyr/arch/nios2/linker.ld @@ -56,9 +56,6 @@ MEMORY RESET (rx) : ORIGIN = _RESET_VECTOR, LENGTH = 0x20 FLASH (rx) : ORIGIN = _RESET_VECTOR + 0x20 , LENGTH = (_ROM_SIZE - 0x20) RAM (wx) : ORIGIN = _EXC_VECTOR, LENGTH = _RAM_SIZE - (_EXC_VECTOR - _RAM_ADDR) - /* Used by and documented in include/linker/intlist.ld */ - IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K - } #else @@ -67,9 +64,6 @@ MEMORY { RESET (wx) : ORIGIN = _RESET_VECTOR, LENGTH = 0x20 RAM (wx) : ORIGIN = _EXC_VECTOR, LENGTH = _RAM_SIZE - (_EXC_VECTOR - _RAM_ADDR) - - /* Used by and documented in include/linker/intlist.ld */ - IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } #endif diff --git a/include/zephyr/arch/riscv/common/linker.ld b/include/zephyr/arch/riscv/common/linker.ld index 3dbec5f0a201e11..3cb587bb7a47dee 100644 --- a/include/zephyr/arch/riscv/common/linker.ld +++ b/include/zephyr/arch/riscv/common/linker.ld @@ -80,9 +80,6 @@ MEMORY RAM (rwx) : ORIGIN = RAM_BASE, LENGTH = RAM_SIZE LINKER_DT_REGIONS() - - /* Used by and documented in include/linker/intlist.ld */ - IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } ENTRY(CONFIG_KERNEL_ENTRY) diff --git a/include/zephyr/arch/x86/ia32/linker.ld b/include/zephyr/arch/x86/ia32/linker.ld index c6db8f8ae75e8a6..c49dcbd83c57e4d 100644 --- a/include/zephyr/arch/x86/ia32/linker.ld +++ b/include/zephyr/arch/x86/ia32/linker.ld @@ -508,24 +508,14 @@ SECTIONS z_mapped_end = .; z_mapped_size = z_mapped_end - z_mapped_start; -#ifndef LINKER_ZEPHYR_FINAL /* static interrupts */ - SECTION_PROLOGUE(intList,,) - { - KEEP(*(.spurIsr)) - KEEP(*(.spurNoErrIsr)) - KEEP(*(.intList)) - KEEP(*(.gnu.linkonce.intList.*)) - } > IDT_LIST -#else - /DISCARD/ : + SECTION_PROLOGUE(intList, 0 (INFO),) { KEEP(*(.spurIsr)) KEEP(*(.spurNoErrIsr)) KEEP(*(.intList)) KEEP(*(.gnu.linkonce.intList.*)) } -#endif diff --git a/include/zephyr/arch/x86/memory.ld b/include/zephyr/arch/x86/memory.ld index 2f270879347102b..b32522a4a09e81b 100644 --- a/include/zephyr/arch/x86/memory.ld +++ b/include/zephyr/arch/x86/memory.ld @@ -92,17 +92,6 @@ MEMORY #ifdef CONFIG_X86_64 /* Special low-memory area for bootstrapping other CPUs from real mode */ LOCORE (wx) : ORIGIN = LOCORE_BASE, LENGTH = LOCORE_SIZE -#else - /* - * On 32-bit x86, fake memory area for build-time IDT generation data. - * 64-bit doesn't use this, interrupts are all managed at runtime. - * - * It doesn't matter where this region goes as it is stripped from the - * final ELF image. The address doesn't even have to be valid on the - * target. However, it shouldn't overlap any other regions. - */ - - IDT_LIST : ORIGIN = 0xFFFF1000, LENGTH = 2K #endif /* !CONFIG_X86_64 */ } #endif /* ARCH_X86_MEMORY_LD */ diff --git a/include/zephyr/linker/intlist.ld b/include/zephyr/linker/intlist.ld index 9cad6f32c32f9a5..75e0fcff5bd1781 100644 --- a/include/zephyr/linker/intlist.ld +++ b/include/zephyr/linker/intlist.ld @@ -18,29 +18,10 @@ * defined, the total number of IRQ lines in the system, followed by * an appropriate number of instances of struct _isr_list. See * include/sw_isr_table.h - * - * You will need to declare a bogus memory region for IDT_LIST. It doesn't - * matter where this region goes as it is stripped from the final ELF image. - * The address doesn't even have to be valid on the target. However, it - * shouldn't overlap any other regions. On most arches the following should be - * fine: - * - * MEMORY { - * .. other regions .. - * IDT_LIST : ORIGIN = 0xfffff7ff, LENGTH = 2K - * } */ -#ifndef LINKER_ZEPHYR_FINAL -SECTION_PROLOGUE(.intList,,) -{ - KEEP(*(.irq_info*)) - KEEP(*(.intList*)) -} GROUP_ROM_LINK_IN(IDT_LIST, IDT_LIST) -#else -/DISCARD/ : +SECTION_PROLOGUE(.intList, 0 (INFO),) { KEEP(*(.irq_info*)) KEEP(*(.intList*)) } -#endif diff --git a/scripts/build/gen_isr_tables.py b/scripts/build/gen_isr_tables.py index 708557582dc4044..70ffb60862b184d 100755 --- a/scripts/build/gen_isr_tables.py +++ b/scripts/build/gen_isr_tables.py @@ -40,7 +40,7 @@ def endian_prefix(): else: return "<" -def read_intlist(intlist_path, syms): +def read_intlist(elfobj, syms): """read a binary file containing the contents of the kernel's .intList section. This is an instance of a header created by include/zephyr/linker/intlist.ld: @@ -75,8 +75,11 @@ def read_intlist(intlist_path, syms): else: intlist_entry_fmt = prefix + "iiII" - with open(intlist_path, "rb") as fp: - intdata = fp.read() + intList_sect = elfobj.get_section_by_name(".intList") + if intList_sect is None: + error("Empty \".intList\" section!") + + intdata = intList_sect.data() header_sz = struct.calcsize(intlist_header_fmt) header = struct.unpack_from(intlist_header_fmt, intdata, 0) @@ -120,8 +123,6 @@ def parse_args(): help="Generate SW ISR table") parser.add_argument("-V", "--vector-table", action="store_true", help="Generate vector table") - parser.add_argument("-i", "--intlist", required=True, - help="Zephyr intlist binary for intList extraction") args = parser.parse_args() @@ -236,6 +237,7 @@ def main(): with open(args.kernel, "rb") as fp: kernel = ELFFile(fp) syms = get_symbols(kernel) + intlist = read_intlist(kernel, syms) if "CONFIG_MULTI_LEVEL_INTERRUPTS" in syms: max_irq_per = syms["CONFIG_MAX_IRQ_PER_AGGREGATOR"] @@ -258,7 +260,6 @@ def main(): debug('3rd level offsets: {}'.format(list_3rd_lvl_offsets)) - intlist = read_intlist(args.intlist, syms) nvec = intlist["num_vectors"] offset = intlist["offset"] diff --git a/soc/arm64/nxp_imx/mimx9/linker.ld b/soc/arm64/nxp_imx/mimx9/linker.ld index 102d9f1b0445d8a..c27bbb20669847d 100644 --- a/soc/arm64/nxp_imx/mimx9/linker.ld +++ b/soc/arm64/nxp_imx/mimx9/linker.ld @@ -60,8 +60,6 @@ MEMORY { FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE RAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE - /* Used by and documented in include/linker/intlist.ld */ - IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } ENTRY(CONFIG_KERNEL_ENTRY) diff --git a/soc/riscv/espressif_esp32/esp32c3/default.ld b/soc/riscv/espressif_esp32/esp32c3/default.ld index 13d08d39bee3c8b..3f236882e556e71 100644 --- a/soc/riscv/espressif_esp32/esp32c3/default.ld +++ b/soc/riscv/espressif_esp32/esp32c3/default.ld @@ -61,10 +61,6 @@ MEMORY dram0_0_seg(RW): org = SRAM_DRAM_ORG, len = I_D_SRAM_SIZE rtc_iram_seg(RWX): org = 0x50000000, len = 0x2000 - -#ifdef CONFIG_GEN_ISR_TABLES - IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000 -#endif } diff --git a/soc/riscv/espressif_esp32/esp32c3/mcuboot.ld b/soc/riscv/espressif_esp32/esp32c3/mcuboot.ld index fe68368fdd12af3..537ee5ad3b3d4b3 100644 --- a/soc/riscv/espressif_esp32/esp32c3/mcuboot.ld +++ b/soc/riscv/espressif_esp32/esp32c3/mcuboot.ld @@ -38,10 +38,6 @@ MEMORY iram_seg (RX) : org = 0x403CA000, len = 0x6000 iram_loader_seg (RX) : org = 0x403D0000, len = 0x4000 dram_seg (RW) : org = 0x3FCD8000, len = 0x8000 - -#ifdef CONFIG_GEN_ISR_TABLES - IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000 -#endif } /* Default entry point: */ diff --git a/soc/riscv/openisa_rv32m1/linker.ld b/soc/riscv/openisa_rv32m1/linker.ld index 7ade2d4e8dd3ca6..9556bc33e6be4c7 100644 --- a/soc/riscv/openisa_rv32m1/linker.ld +++ b/soc/riscv/openisa_rv32m1/linker.ld @@ -73,11 +73,6 @@ MEMORY VECTORS (rx) : ORIGIN = VECTOR_BASE, LENGTH = VECTOR_SIZE #endif RAM (rwx) : ORIGIN = RAM_BASE, LENGTH = RAM_SIZE - /* - * Special section, not included in the final binary, used - * to generate interrupt tables. See include/linker/intlist.ld. - */ - IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } ENTRY(CONFIG_KERNEL_ENTRY) diff --git a/soc/riscv/riscv-ite/it8xxx2/linker.ld b/soc/riscv/riscv-ite/it8xxx2/linker.ld index 798e1ae6dc38251..9f0ca7a1b2f9f66 100644 --- a/soc/riscv/riscv-ite/it8xxx2/linker.ld +++ b/soc/riscv/riscv-ite/it8xxx2/linker.ld @@ -77,9 +77,6 @@ MEMORY RAM (rwx) : ORIGIN = RAM_BASE, LENGTH = RAM_SIZE LINKER_DT_REGIONS() - - /* Used by and documented in include/linker/intlist.ld */ - IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } ENTRY(CONFIG_KERNEL_ENTRY) diff --git a/soc/riscv/riscv-privileged/andes_v5/ae350/linker.ld b/soc/riscv/riscv-privileged/andes_v5/ae350/linker.ld index a47aceb60389409..84c36fa657a124c 100644 --- a/soc/riscv/riscv-privileged/andes_v5/ae350/linker.ld +++ b/soc/riscv/riscv-privileged/andes_v5/ae350/linker.ld @@ -81,9 +81,6 @@ MEMORY RAM (rwx) : ORIGIN = RAM_BASE, LENGTH = RAM_SIZE LINKER_DT_REGIONS() - - /* Used by and documented in include/linker/intlist.ld */ - IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } ENTRY(CONFIG_KERNEL_ENTRY) diff --git a/soc/sparc/gr716a/linker.ld b/soc/sparc/gr716a/linker.ld index 9d25326f58ae8ea..ee8af917ada0ae2 100644 --- a/soc/sparc/gr716a/linker.ld +++ b/soc/sparc/gr716a/linker.ld @@ -26,8 +26,6 @@ MEMORY RAM (rw) : ORIGIN = 0x30000000, LENGTH = 64K SRAM (x) : ORIGIN = 0x31000000, LENGTH = 128K extram (rwx) : ORIGIN = 0x40000000, LENGTH = 256M - /* refer to include/linker/inlist.ld */ - IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } REGION_ALIAS("REGION_TEXT", SRAM); diff --git a/soc/sparc/leon3/linker.ld b/soc/sparc/leon3/linker.ld index 20eeb811f8f3410..6d0a3b96846ff9b 100644 --- a/soc/sparc/leon3/linker.ld +++ b/soc/sparc/leon3/linker.ld @@ -17,8 +17,6 @@ MEMORY { rom (rx) : ORIGIN = 0x00000000, LENGTH = 512M RAM (rwx) : ORIGIN = CONFIG_SRAM_BASE_ADDRESS, LENGTH = KB(CONFIG_SRAM_SIZE) - /* refer to include/linker/inlist.ld */ - IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } REGION_ALIAS("REGION_TEXT", RAM); diff --git a/soc/xtensa/espressif_esp32/esp32/default.ld b/soc/xtensa/espressif_esp32/esp32/default.ld index beb79d027d11bef..8f138cd14afe8a0 100644 --- a/soc/xtensa/espressif_esp32/esp32/default.ld +++ b/soc/xtensa/espressif_esp32/esp32/default.ld @@ -93,9 +93,6 @@ MEMORY #if defined(CONFIG_ESP_SPIRAM) ext_ram_seg(RW): org = 0x3F800000, len = CONFIG_ESP_SPIRAM_SIZE #endif -#ifdef CONFIG_GEN_ISR_TABLES - IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000 -#endif } /* Default entry point: */ diff --git a/soc/xtensa/espressif_esp32/esp32/mcuboot.ld b/soc/xtensa/espressif_esp32/esp32/mcuboot.ld index a3b2af762dd7ee7..88dd343dbf27329 100644 --- a/soc/xtensa/espressif_esp32/esp32/mcuboot.ld +++ b/soc/xtensa/espressif_esp32/esp32/mcuboot.ld @@ -39,10 +39,6 @@ MEMORY iram_loader_seg (RWX) : org = 0x40078000, len = 0x4000 iram_seg (RWX) : org = 0x4009C000, len = 0x8000 dram_seg (RW) : org = 0x3FFF0000, len = 0x6000 - -#ifdef CONFIG_GEN_ISR_TABLES - IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000 -#endif } ENTRY(CONFIG_KERNEL_ENTRY) diff --git a/soc/xtensa/espressif_esp32/esp32_net/linker.ld b/soc/xtensa/espressif_esp32/esp32_net/linker.ld index 6c1b69872b19a19..82fb242ead70ad7 100644 --- a/soc/xtensa/espressif_esp32/esp32_net/linker.ld +++ b/soc/xtensa/espressif_esp32/esp32_net/linker.ld @@ -32,9 +32,6 @@ MEMORY dram0_shm0_seg(RW): org = 0x3FFE5230, len = 16K /* shared RAM reserved for IPM */ dram0_sem0_seg(RW): org = 0x3FFED238, len = 8 /*shared data reserved for IPM data header */ dram0_1_seg(RW): org = 0x3FFE9238 + CONFIG_ESP32_BT_RESERVE_DRAM, len = 0x17CB0 - 0xEE0 - CONFIG_ESP32_BT_RESERVE_DRAM -#ifdef CONFIG_GEN_ISR_TABLES - IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000 -#endif } /* Default entry point: */ diff --git a/soc/xtensa/espressif_esp32/esp32s2/default.ld b/soc/xtensa/espressif_esp32/esp32s2/default.ld index 7aff462873b7b74..a70c43d854bbfc0 100644 --- a/soc/xtensa/espressif_esp32/esp32s2/default.ld +++ b/soc/xtensa/espressif_esp32/esp32s2/default.ld @@ -66,9 +66,6 @@ MEMORY #if defined(CONFIG_ESP_SPIRAM) ext_ram_seg(RW): org = 0x3f500000, len = CONFIG_ESP_SPIRAM_SIZE #endif -#ifdef CONFIG_GEN_ISR_TABLES - IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000 -#endif } /* Default entry point: */ diff --git a/soc/xtensa/espressif_esp32/esp32s2/mcuboot.ld b/soc/xtensa/espressif_esp32/esp32s2/mcuboot.ld index 6d52100db752ab2..e74ab2bbdb6fb7b 100644 --- a/soc/xtensa/espressif_esp32/esp32s2/mcuboot.ld +++ b/soc/xtensa/espressif_esp32/esp32s2/mcuboot.ld @@ -39,11 +39,6 @@ MEMORY iram_seg (RWX) : org = 0x40040000, len = 0x6000 iram_loader_seg (RWX) : org = 0x40046000, len = 0x2000 dram_seg (RW) : org = 0x3FFE6000, len = 0x6000 - -#ifdef CONFIG_GEN_ISR_TABLES - IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000 -#endif - } ENTRY(CONFIG_KERNEL_ENTRY) diff --git a/soc/xtensa/espressif_esp32/esp32s3/default.ld b/soc/xtensa/espressif_esp32/esp32s3/default.ld index 27e27a0a8cba41f..a4267e815fb7e4b 100644 --- a/soc/xtensa/espressif_esp32/esp32s3/default.ld +++ b/soc/xtensa/espressif_esp32/esp32s3/default.ld @@ -90,10 +90,6 @@ MEMORY /* RTC slow memory (data accessible). Persists over deep sleep. */ rtc_slow_seg(RW): org = 0x50000000, len = 0x2000 - -#ifdef CONFIG_GEN_ISR_TABLES - IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000 -#endif } /* Default entry point: */ diff --git a/soc/xtensa/espressif_esp32/esp32s3/mcuboot.ld b/soc/xtensa/espressif_esp32/esp32s3/mcuboot.ld index 3d1049506ca77ad..7243aa0e93f329f 100644 --- a/soc/xtensa/espressif_esp32/esp32s3/mcuboot.ld +++ b/soc/xtensa/espressif_esp32/esp32s3/mcuboot.ld @@ -39,10 +39,6 @@ MEMORY iram_seg(RWX) : org = 0x403B6000, len = 0x8000 iram_loader_seg(RWX) : org = 0x403BE000, len = 0x2000 dram_seg(RW) : org = 0x3FCD0000, len = 0x6000 - -#ifdef CONFIG_GEN_ISR_TABLES - IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000 -#endif } /* Default entry point: */ diff --git a/soc/xtensa/intel_adsp/ace/ace-link.ld b/soc/xtensa/intel_adsp/ace/ace-link.ld index a4aaf6b8087d90c..dde35dd098b5583 100644 --- a/soc/xtensa/intel_adsp/ace/ace-link.ld +++ b/soc/xtensa/intel_adsp/ace/ace-link.ld @@ -45,10 +45,6 @@ ENTRY(rom_entry); #define ucram ram #endif -/* intlist.ld needs an IDT_LIST memory region */ -#define IDT_BASE 0xe0000000 -#define IDT_SIZE 0x2000 - /* rimage module sections are C struct data, and thus flagged ALLOC. * The xcc linker demands they be in a declared memory region even if * the enclosing output section is (NOLOAD). Put them here. @@ -112,11 +108,6 @@ MEMORY { ucram : org = RPO_SET(RAM_BASE, CONFIG_XTENSA_UNCACHED_REGION), len = RAM_SIZE -#endif -#ifdef CONFIG_GEN_ISR_TABLES - IDT_LIST : - org = IDT_BASE, - len = IDT_SIZE #endif lpram : org = LP_SRAM_BASE, diff --git a/soc/xtensa/intel_adsp/cavs/include/xtensa-cavs-linker.ld b/soc/xtensa/intel_adsp/cavs/include/xtensa-cavs-linker.ld index e9ecbe2ba1b6783..3c04af32a73370c 100644 --- a/soc/xtensa/intel_adsp/cavs/include/xtensa-cavs-linker.ld +++ b/soc/xtensa/intel_adsp/cavs/include/xtensa-cavs-linker.ld @@ -45,10 +45,6 @@ ENTRY(rom_entry); #define ucram RAM #endif -/* intlist.ld needs an IDT_LIST memory region */ -#define IDT_BASE 0xe0000000 -#define IDT_SIZE 0x2000 - /* rimage module sections are C struct data, and thus flagged ALLOC. * The xcc linker demands they be in a declared memory region even if * the enclosing output section is (NOLOAD). Put them here. @@ -124,11 +120,6 @@ MEMORY { ucram : org = RPO_SET(RAM_BASE, CONFIG_XTENSA_UNCACHED_REGION), len = RAM_SIZE -#endif -#ifdef CONFIG_GEN_ISR_TABLES - IDT_LIST : - org = IDT_BASE, - len = IDT_SIZE #endif lpram : org = LP_SRAM_BASE, diff --git a/soc/xtensa/nxp_adsp/imx8/linker.ld b/soc/xtensa/nxp_adsp/imx8/linker.ld index 599ef7339b802ec..fd4a480cae560bc 100644 --- a/soc/xtensa/nxp_adsp/imx8/linker.ld +++ b/soc/xtensa/nxp_adsp/imx8/linker.ld @@ -89,11 +89,6 @@ MEMORY sdram1 : org = SDRAM1_BASE + SOF_MAILBOX_SIZE, len = SDRAM1_SIZE - SOF_MAILBOX_SIZE -#ifdef CONFIG_GEN_ISR_TABLES - IDT_LIST : - org = IDT_BASE, - len = IDT_SIZE -#endif static_uuid_entries_seg (!ari) : org = UUID_ENTRY_ELF_BASE, diff --git a/soc/xtensa/nxp_adsp/imx8m/linker.ld b/soc/xtensa/nxp_adsp/imx8m/linker.ld index aab0a0b6548fc1e..f3927f0a1aab426 100644 --- a/soc/xtensa/nxp_adsp/imx8m/linker.ld +++ b/soc/xtensa/nxp_adsp/imx8m/linker.ld @@ -89,11 +89,6 @@ MEMORY sdram1 : org = SDRAM1_BASE + SOF_MAILBOX_SIZE, len = SDRAM1_SIZE - SOF_MAILBOX_SIZE -#ifdef CONFIG_GEN_ISR_TABLES - IDT_LIST : - org = IDT_BASE, - len = IDT_SIZE -#endif static_uuid_entries_seg (!ari) : org = UUID_ENTRY_ELF_BASE, diff --git a/soc/xtensa/sample_controller/include/xtensa-sample-controller.ld b/soc/xtensa/sample_controller/include/xtensa-sample-controller.ld index 269f1d55a6159b1..a93727d88abaacc 100644 --- a/soc/xtensa/sample_controller/include/xtensa-sample-controller.ld +++ b/soc/xtensa/sample_controller/include/xtensa-sample-controller.ld @@ -46,9 +46,6 @@ MEMORY srom0_seg : org = 0x50000000, len = 0x300 srom1_seg : org = 0x50000300, len = 0xFFFD00 RAM : org = 0x60000000, len = 0x4000000 -#ifdef CONFIG_GEN_ISR_TABLES - IDT_LIST : org = 0x3ffbe000, len = 0x2000 -#endif } PHDRS