diff --git a/boards/xtensa/nxp_adsp_imx8m/nxp_adsp_imx8m_defconfig b/boards/xtensa/nxp_adsp_imx8m/nxp_adsp_imx8m_defconfig
index f3b4ca76cbe9a51..60c317cbb9893f3 100644
--- a/boards/xtensa/nxp_adsp_imx8m/nxp_adsp_imx8m_defconfig
+++ b/boards/xtensa/nxp_adsp_imx8m/nxp_adsp_imx8m_defconfig
@@ -36,3 +36,13 @@ CONFIG_UART_CONSOLE=y
 
 # enable pin controller
 CONFIG_PINCTRL=y
+
+# multi-level interrupt configuration
+CONFIG_MULTI_LEVEL_INTERRUPTS=y
+CONFIG_2ND_LEVEL_INTERRUPTS=y
+CONFIG_2ND_LVL_ISR_TBL_OFFSET=32
+CONFIG_MAX_IRQ_PER_AGGREGATOR=64
+CONFIG_NUM_2ND_LEVEL_AGGREGATORS=3
+CONFIG_2ND_LVL_INTR_00_OFFSET=19
+CONFIG_2ND_LVL_INTR_01_OFFSET=20
+CONFIG_2ND_LVL_INTR_02_OFFSET=21
diff --git a/dts/bindings/interrupt-controller/nxp,irqsteer-intc.yaml b/dts/bindings/interrupt-controller/nxp,irqsteer-intc.yaml
index 03b5d3b39e036ea..8f9f9220cdc1910 100644
--- a/dts/bindings/interrupt-controller/nxp,irqsteer-intc.yaml
+++ b/dts/bindings/interrupt-controller/nxp,irqsteer-intc.yaml
@@ -2,12 +2,4 @@ description: i.MX DSP interrupt controller
 
 compatible: "nxp,irqsteer-intc"
 
-include: [interrupt-controller.yaml, base.yaml]
-
-properties:
-  "#interrupt-cells":
-    const: 2
-
-interrupt-cells:
-  - irq
-  - priority
+include: [base.yaml]
diff --git a/dts/xtensa/nxp/nxp_imx8m.dtsi b/dts/xtensa/nxp/nxp_imx8m.dtsi
index 9e72a3d59ed7bb3..3ffe581e6146e16 100644
--- a/dts/xtensa/nxp/nxp_imx8m.dtsi
+++ b/dts/xtensa/nxp/nxp_imx8m.dtsi
@@ -17,6 +17,16 @@
 			device_type = "cpu";
 			compatible = "cdns,tensilica-xtensa-lx6";
 			reg = <0>;
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			clic: interrupt-controller@0 {
+				compatible = "cdns,xtensa-core-intc";
+				reg = <0>;
+				interrupt-controller;
+				#interrupt-cells = <3>;
+			};
 		};
 	};
 
@@ -33,12 +43,39 @@
 	};
 
 	soc {
-		interrupt-parent = <&irqsteer>;
-
-		irqsteer: interrupt-controller {
+		irqsteer: interrupt-controller@30a80000 {
 			compatible = "nxp,irqsteer-intc";
-			interrupt-controller;
-			#interrupt-cells = <2>;
+			reg = <0x30a80000 DT_SIZE_K(64)>;
+
+			#size-cells = <0>;
+			#address-cells = <1>;
+
+			chan0: interrupt-controller@0 {
+				compatible = "nxp,irqsteer-channel";
+				reg = <0>;
+				interrupt-controller;
+				#interrupt-cells = <1>;
+				interrupts-extended = <&clic 19 0 0>;
+				interrupt-channel = <0>;
+			};
+
+			chan1: interrupt-controller@1 {
+				compatible = "nxp,irqsteer-channel";
+				reg = <1>;
+				interrupt-controller;
+				#interrupt-cells = <1>;
+				interrupts-extended = <&clic 20 0 0>;
+				interrupt-channel = <1>;
+			};
+
+			chan2: interrupt-controller@2 {
+				compatible = "nxp,irqsteer-channel";
+				reg = <2>;
+				interrupt-controller;
+				#interrupt-cells = <1>;
+				interrupts-extended = <&clic 21 0 0>;
+				interrupt-channel = <2>;
+			};
 		};
 
 		ccm: ccm@30380000 {
@@ -71,7 +108,8 @@
 		mailbox0: mailbox@30e70000 {
 			compatible = "nxp,imx-mu-rev2";
 			reg = <0x30e70000 0x10000>;
-			interrupts = <7 0>;
+			interrupt-parent = <&clic>;
+			interrupts = <7 0 0>;
 			rdc = <0>;
 			status = "disabled";
 		};
diff --git a/soc/xtensa/nxp_adsp/common/soc.c b/soc/xtensa/nxp_adsp/common/soc.c
index 8c80ff77308b053..dba85cd23640360 100644
--- a/soc/xtensa/nxp_adsp/common/soc.c
+++ b/soc/xtensa/nxp_adsp/common/soc.c
@@ -20,6 +20,11 @@
 #include <zephyr/logging/log.h>
 LOG_MODULE_REGISTER(soc);
 
+/* TODO: this is only temporary. Shall be removed when all i.MX8
+ * SoCs are changed to using the IRQ_STEER driver.
+ */
+#ifndef CONFIG_SOC_SERIES_NXP_IMX8M
+
 void z_soc_irq_enable(uint32_t irq)
 {
 	/*
@@ -45,3 +50,5 @@ int z_soc_irq_is_enabled(unsigned int irq)
 
 	return ret;
 }
+
+#endif /* CONFIG_SOC_SERIES_NXP_IMX8M */
diff --git a/soc/xtensa/nxp_adsp/imx8m/Kconfig.defconfig.series b/soc/xtensa/nxp_adsp/imx8m/Kconfig.defconfig.series
index 03967cb74e4336e..4bb6961639148c4 100644
--- a/soc/xtensa/nxp_adsp/imx8m/Kconfig.defconfig.series
+++ b/soc/xtensa/nxp_adsp/imx8m/Kconfig.defconfig.series
@@ -32,12 +32,6 @@ config SYS_CLOCK_TICKS_PER_SEC
 config KERNEL_ENTRY
 	default "__start"
 
-config MULTI_LEVEL_INTERRUPTS
-	default n
-
-config 2ND_LEVEL_INTERRUPTS
-	default n
-
 config DYNAMIC_INTERRUPTS
 	default y