From 9ac85254961012dd6f26962c2bc1cade8f2abd8d Mon Sep 17 00:00:00 2001
From: Joakim Andersson <joakim.andersson@nordicsemi.no>
Date: Fri, 29 Sep 2023 09:09:58 +0200
Subject: [PATCH] boards: nrf5340dk_nrf5340: Add default HW flow control pins
 to uart1

Add the default HW flow control pins to the uart1 node.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
---
 .../nrf5340_cpuapp_common-pinctrl.dtsi                 | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/boards/arm/nrf5340dk_nrf5340/nrf5340_cpuapp_common-pinctrl.dtsi b/boards/arm/nrf5340dk_nrf5340/nrf5340_cpuapp_common-pinctrl.dtsi
index 6db9767c0dc8a3..f93e3a694029c6 100644
--- a/boards/arm/nrf5340dk_nrf5340/nrf5340_cpuapp_common-pinctrl.dtsi
+++ b/boards/arm/nrf5340dk_nrf5340/nrf5340_cpuapp_common-pinctrl.dtsi
@@ -84,10 +84,12 @@
 
 	uart1_default: uart1_default {
 		group1 {
-			psels = <NRF_PSEL(UART_TX, 1, 1)>;
+			psels = <NRF_PSEL(UART_TX, 1, 1)>,
+				<NRF_PSEL(UART_RTS, 0, 11)>;
 		};
 		group2 {
-			psels = <NRF_PSEL(UART_RX, 1, 0)>;
+			psels = <NRF_PSEL(UART_RX, 1, 0)>,
+				<NRF_PSEL(UART_CTS, 0, 10)>;
 			bias-pull-up;
 		};
 	};
@@ -95,7 +97,9 @@
 	uart1_sleep: uart1_sleep {
 		group1 {
 			psels = <NRF_PSEL(UART_TX, 1, 1)>,
-				<NRF_PSEL(UART_RX, 1, 0)>;
+				<NRF_PSEL(UART_RX, 1, 0)>,
+				<NRF_PSEL(UART_RTS, 0, 11)>,
+				<NRF_PSEL(UART_CTS, 0, 10)>;
 			low-power-enable;
 		};
 	};