diff --git a/soc/xtensa/intel_adsp/common/include/soc.h b/soc/xtensa/intel_adsp/common/include/soc.h
index e2f74b3db4a789..014ba18e434947 100644
--- a/soc/xtensa/intel_adsp/common/include/soc.h
+++ b/soc/xtensa/intel_adsp/common/include/soc.h
@@ -27,10 +27,6 @@ extern void soc_start_core(int cpu_num);
 extern bool soc_cpus_active[CONFIG_MP_MAX_NUM_CPUS];
 
 /* Legacy cache APIs still used in a few places */
-#define SOC_DCACHE_FLUSH(addr, size)		\
-	sys_cache_data_flush_range((addr), (size))
-#define SOC_DCACHE_INVALIDATE(addr, size)	\
-	sys_cache_data_invd_range((addr), (size))
 #define z_soc_cached_ptr(p) arch_xtensa_cached_ptr(p)
 #define z_soc_uncached_ptr(p) arch_xtensa_uncached_ptr(p)
 
diff --git a/soc/xtensa/nxp_adsp/common/include/adsp/cache.h b/soc/xtensa/nxp_adsp/common/include/adsp/cache.h
index 9071af5c9a01e6..067c08901403cf 100644
--- a/soc/xtensa/nxp_adsp/common/include/adsp/cache.h
+++ b/soc/xtensa/nxp_adsp/common/include/adsp/cache.h
@@ -9,10 +9,4 @@
 
 #include <xtensa/hal.h>
 
-/* Macros for data cache operations */
-#define SOC_DCACHE_FLUSH(addr, size)		\
-	sys_cache_data_flush_range((addr), (size))
-#define SOC_DCACHE_INVALIDATE(addr, size)	\
-	sys_cache_data_invd_range((addr), (size))
-
 #endif