From cb491cacad74bd81a771564add67f722f6c10796 Mon Sep 17 00:00:00 2001 From: Alexander Razinkov Date: Wed, 24 May 2023 09:50:43 +0300 Subject: [PATCH] drivers: support 64-bit addresses from devicetree for PLIC, MTIMER, UART Usage of 64-bit address constants from devicetree without an UINT64_C wrapping macro results in the following warning and the cut-off of the address value: "warning: integer constant is so large that it is unsigned" This change fixes such issue for PLIC, MTIMER and UART in case they are used with some 64-bit RISC-V platforms Signed-off-by: Alexander Razinkov --- drivers/interrupt_controller/intc_plic.c | 6 +++--- drivers/timer/riscv_machine_timer.c | 6 +++--- include/zephyr/sys/device_mmio.h | 4 ++-- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/interrupt_controller/intc_plic.c b/drivers/interrupt_controller/intc_plic.c index d7958ad9b4a15b..11d41e2f191a1a 100644 --- a/drivers/interrupt_controller/intc_plic.c +++ b/drivers/interrupt_controller/intc_plic.c @@ -22,9 +22,9 @@ #include #define PLIC_MAX_PRIO DT_INST_PROP(0, riscv_max_priority) -#define PLIC_PRIO DT_INST_REG_ADDR_BY_NAME(0, prio) -#define PLIC_IRQ_EN DT_INST_REG_ADDR_BY_NAME(0, irq_en) -#define PLIC_REG DT_INST_REG_ADDR_BY_NAME(0, reg) +#define PLIC_PRIO DT_INST_REG_ADDR_BY_NAME_U64(0, prio) +#define PLIC_IRQ_EN DT_INST_REG_ADDR_BY_NAME_U64(0, irq_en) +#define PLIC_REG DT_INST_REG_ADDR_BY_NAME_U64(0, reg) #define PLIC_IRQS (CONFIG_NUM_IRQS - CONFIG_2ND_LVL_ISR_TBL_OFFSET) #define PLIC_EN_SIZE ((PLIC_IRQS >> 5) + 1) diff --git a/drivers/timer/riscv_machine_timer.c b/drivers/timer/riscv_machine_timer.c index f4ac7afe4d43ff..7ddbc359dfa7dd 100644 --- a/drivers/timer/riscv_machine_timer.c +++ b/drivers/timer/riscv_machine_timer.c @@ -67,9 +67,9 @@ #define DT_DRV_COMPAT scr_machine_timer #define MTIMER_HAS_DIVIDER -#define MTIMEDIV_REG (DT_INST_REG_ADDR(0) + 4) -#define MTIME_REG (DT_INST_REG_ADDR(0) + 8) -#define MTIMECMP_REG (DT_INST_REG_ADDR(0) + 16) +#define MTIMEDIV_REG (DT_INST_REG_ADDR_U64(0) + 4) +#define MTIME_REG (DT_INST_REG_ADDR_U64(0) + 8) +#define MTIMECMP_REG (DT_INST_REG_ADDR_U64(0) + 16) #define TIMER_IRQN DT_INST_IRQN(0) #endif diff --git a/include/zephyr/sys/device_mmio.h b/include/zephyr/sys/device_mmio.h index 887ea7ee18e706..bc28c3e91e448b 100644 --- a/include/zephyr/sys/device_mmio.h +++ b/include/zephyr/sys/device_mmio.h @@ -116,12 +116,12 @@ struct z_device_mmio_rom { #define Z_DEVICE_MMIO_ROM_INITIALIZER(node_id) \ { \ - .addr = DT_REG_ADDR(node_id) \ + .addr = (mm_reg_t)DT_REG_ADDR_U64(node_id) \ } #define Z_DEVICE_MMIO_NAMED_ROM_INITIALIZER(name, node_id) \ { \ - .addr = DT_REG_ADDR_BY_NAME(node_id, name) \ + .addr = (mm_reg_t)DT_REG_ADDR_BY_NAME_U64(node_id, name) \ } #endif /* DEVICE_MMIO_IS_IN_RAM */