From ede10612f16a86b671b017b2890bcffff33c4687 Mon Sep 17 00:00:00 2001 From: Wojciech Sipak Date: Thu, 6 Jul 2023 12:20:21 +0200 Subject: [PATCH] soc: quicklogic_eos_s3: remove unneeded code Pinmuxing is now done by a pinctrl driver, not by board.c, so the code used previously for pinmuxing can be removed. Fixes #59186. Signed-off-by: Wojciech Sipak --- soc/arm/quicklogic_eos_s3/soc.c | 14 -------------- soc/arm/quicklogic_eos_s3/soc.h | 4 ---- soc/arm/quicklogic_eos_s3/soc_pinmap.h | 10 ---------- 3 files changed, 28 deletions(-) diff --git a/soc/arm/quicklogic_eos_s3/soc.c b/soc/arm/quicklogic_eos_s3/soc.c index 81d070df427cb53..ed2cdb70ef96430 100644 --- a/soc/arm/quicklogic_eos_s3/soc.c +++ b/soc/arm/quicklogic_eos_s3/soc.c @@ -20,20 +20,6 @@ void eos_s3_lock_disable(void) MISC_CTRL->LOCK_KEY_CTRL = 1; } -int eos_s3_io_mux(uint32_t pad_nr, uint32_t pad_cfg) -{ - volatile uint32_t *p = (uint32_t *)IO_MUX_BASE; - - if (pad_nr > EOS_S3_MAX_PAD_NR) { - return -EINVAL; - } - - p += pad_nr; - *p = pad_cfg; - - return 0; -} - static void eos_s3_cru_init(void) { /* Set desired frequency */ diff --git a/soc/arm/quicklogic_eos_s3/soc.h b/soc/arm/quicklogic_eos_s3/soc.h index b294be96e9bbabf..a82e5399248c882 100644 --- a/soc/arm/quicklogic_eos_s3/soc.h +++ b/soc/arm/quicklogic_eos_s3/soc.h @@ -46,11 +46,7 @@ #define OSC_SET_FREQ_INC(FREQ) (AIP->OSC_CTRL_1 = ((FREQ / 32768) - 3) & 0xFFF) #define OSC_GET_FREQ_INC() (((AIP->OSC_CTRL_1 & 0xFFF) + 3) * 32768) -#define EOS_S3_MAX_PAD_NR 45 - void eos_s3_lock_enable(void); void eos_s3_lock_disable(void); -int eos_s3_io_mux(uint32_t pad_nr, uint32_t pad_cfg); - #endif /* _SOC__H_ */ diff --git a/soc/arm/quicklogic_eos_s3/soc_pinmap.h b/soc/arm/quicklogic_eos_s3/soc_pinmap.h index 65715300c61177d..1acee4443649770 100644 --- a/soc/arm/quicklogic_eos_s3/soc_pinmap.h +++ b/soc/arm/quicklogic_eos_s3/soc_pinmap.h @@ -9,14 +9,4 @@ #include -/* Set UART TX to PAD44 */ -#define UART_TXD_PAD44 (UART_TXD_SEL_PAD44 | PAD_CTRL_SEL_AO_REG \ - | PAD_OEN_NORMAL | PAD_P_Z | PAD_SR_SLOW \ - | PAD_E_4MA | PAD_REN_DISABLE | PAD_SMT_DISABLE) - -/* Set UART RX to PAD45 */ -#define UART_RXD_PAD45 (UART_RXD_SEL_PAD45 | PAD_CTRL_SEL_AO_REG \ - | PAD_OEN_DISABLE | PAD_P_Z | PAD_SR_SLOW \ - | PAD_E_4MA | PAD_REN_ENABLE | PAD_SMT_DISABLE) - #endif /* _QUICKLOGIC_EOS_S3_SOC_PINMAP_H_ */