From 7ad21755c1a6dffbfae1b23dbc4a2b52e579bbc9 Mon Sep 17 00:00:00 2001 From: Tran Van Quy Date: Wed, 18 Sep 2024 13:24:09 +0700 Subject: [PATCH 1/5] scripts: dts: add function to handle Renesas RA interrupt number Add the map_renesas_ra_irq to handle interrupt number for Renesas RA series to avoid full of interrupt ID Signed-off-by: Tran Van Quy --- scripts/dts/gen_defines.py | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/scripts/dts/gen_defines.py b/scripts/dts/gen_defines.py index a9d02dcd4d75d4..13c1c0d8330bff 100755 --- a/scripts/dts/gen_defines.py +++ b/scripts/dts/gen_defines.py @@ -46,6 +46,8 @@ def format(self, record): def main(): global header_file global flash_area_num + global isr_index + global result args = parse_args() @@ -68,6 +70,8 @@ def main(): sys.exit(f"devicetree error: {e}") flash_area_num = 0 + isr_index = 0 + result = 0 # Save merged DTS source, as a debugging aid with open(args.dts_out, "w", encoding="utf-8") as f: @@ -460,9 +464,27 @@ def map_arm_gic_irq_type(irq, irq_num): return irq_num + 16 err(f"Invalid interrupt type specified for {irq!r}") + def map_renesas_ra_irq(irq): + # Handles isr vector table generation + global isr_index, result + if "irq" not in irq.data: + err(f"Expected binding for {irq.controller!r} to have 'irq' in " + "interrupt-cells") + irq_num = irq.data["irq"] + if node.status == "okay": + if irq_num != ra_icu_unspecified: + logging.info(f"Fixed interrupt number {irq_num} will be " + "automatically allocated") + result = isr_index + isr_index += 1 + return result + else: + return ra_icu_unspecified + idx_vals = [] name_vals = [] path_id = node.z_path_id + ra_icu_unspecified = 0xff if node.interrupts is not None: idx_vals.append((f"{path_id}_IRQ_NUM", len(node.interrupts))) @@ -474,6 +496,8 @@ def map_arm_gic_irq_type(irq, irq_num): if cell_name == "irq": if "arm,gic" in irq.controller.compats: cell_value = map_arm_gic_irq_type(irq, cell_value) + elif "renesas,ra-interrupt-controller" in irq.controller.compats: + cell_value = map_renesas_ra_irq(irq) idx_vals.append((f"{path_id}_IRQ_IDX_{i}_EXISTS", 1)) idx_macro = f"{path_id}_IRQ_IDX_{i}_VAL_{name}" From b288bac6004f2a6ef8e68e24ddd13cc7957cf473 Mon Sep 17 00:00:00 2001 From: Tran Van Quy Date: Wed, 18 Sep 2024 13:29:22 +0700 Subject: [PATCH 2/5] dts: renesas: Update interrupt ID in dts for Renesas RA8 series Update interrupt for Renesas RA8 series, to use with dts python script. The target is to handle the interrupt ID allocation in build time Signed-off-by: Tran Van Quy --- dts/arm/renesas/ra/ra8/ra8x1.dtsi | 46 +++++++++++++------ .../renesas,ra-interrupt-controller.yaml | 19 ++++++++ .../renesas-ra-interrupt.h | 15 ++++++ 3 files changed, 66 insertions(+), 14 deletions(-) create mode 100644 dts/bindings/interrupt-controller/renesas,ra-interrupt-controller.yaml create mode 100644 include/zephyr/dt-bindings/interrupt-controller/renesas-ra-interrupt.h diff --git a/dts/arm/renesas/ra/ra8/ra8x1.dtsi b/dts/arm/renesas/ra/ra8/ra8x1.dtsi index 589adc00dba27f..577600945e975c 100644 --- a/dts/arm/renesas/ra/ra8/ra8x1.dtsi +++ b/dts/arm/renesas/ra/ra8/ra8x1.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include / { cpus { @@ -30,7 +31,14 @@ }; soc { - interrupt-parent = <&nvic>; + interrupt-parent = <&icu>; + icu: interrupt-controller@4000c000 { + compatible = "renesas,ra-interrupt-controller"; + reg = <0x4000c000 0x40>; + reg-names = "icu"; + interrupt-controller; + #interrupt-cells = <2>; + }; sram0: memory@22000000 { compatible = "mmio-sram"; @@ -173,7 +181,8 @@ iic0: iic0@4025e000 { compatible = "renesas,ra-iic"; channel = <0>; - interrupts = <87 1>, <88 1>, <89 1>, <90 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x4025E000 0x100>; status = "disabled"; @@ -181,7 +190,8 @@ iic1: iic1@4025e100 { compatible = "renesas,ra-iic"; channel = <1>; - interrupts = <91 1>, <92 1>, <93 1>, <94 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x4025E100 0x100>; status = "disabled"; @@ -189,7 +199,8 @@ sci0: sci0@40358000 { compatible = "renesas,ra-sci"; - interrupts = <4 1>, <5 1>, <6 1>, <7 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40358000 0x100>; clocks = <&sciclk MSTPB 31>; @@ -203,7 +214,8 @@ sci1: sci1@40358100 { compatible = "renesas,ra-sci"; - interrupts = <8 1>, <9 1>, <10 1>, <11 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40358100 0x100>; clocks = <&sciclk MSTPB 30>; @@ -217,7 +229,8 @@ sci2: sci2@40358200 { compatible = "renesas,ra-sci"; - interrupts = <12 1>, <13 1>, <14 1>, <15 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40358200 0x100>; clocks = <&sciclk MSTPB 29>; @@ -231,7 +244,8 @@ sci3: sci3@40358300 { compatible = "renesas,ra-sci"; - interrupts = <16 1>, <17 1>, <18 1>, <19 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40358300 0x100>; clocks = <&sciclk MSTPB 28>; @@ -245,7 +259,8 @@ sci4: sci4@40358400 { compatible = "renesas,ra-sci"; - interrupts = <20 1>, <21 1>, <22 1>, <23 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40358400 0x100>; clocks = <&sciclk MSTPB 27>; @@ -259,7 +274,8 @@ sci9: sci9@40358900 { compatible = "renesas,ra-sci"; - interrupts = <24 1>, <25 1>, <26 1>, <27 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40358900 0x100>; clocks = <&sciclk MSTPB 22>; @@ -276,13 +292,13 @@ reg = <0x40100000 0x20000>; #address-cells = <1>; #size-cells = <1>; - interrupts = <38 2>, <39 2>; + interrupts = , ; interrupt-names = "frdyi", "fiferr"; }; adc0: adc@40332000 { compatible = "renesas,ra-adc"; - interrupts = <38 1>; + interrupts = ; interrupt-names = "scanend"; reg = <0x40332000 0x100>; #io-channel-cells = <1>; @@ -293,7 +309,7 @@ adc1: adc@40332200 { compatible = "renesas,ra-adc"; - interrupts = <39 1>; + interrupts = ; interrupt-names = "scanend"; reg = <0x40332200 0x100>; #io-channel-cells = <1>; @@ -313,7 +329,8 @@ channel = <0>; clocks = <&pclka MSTPB 19>; clock-names = "spiclk"; - interrupts = <28 1>, <29 1>, <30 1>, <31 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x4035c000 0x100>; status = "disabled"; @@ -326,7 +343,8 @@ channel = <1>; clocks = <&pclka MSTPB 18>; clock-names = "spiclk"; - interrupts = <32 1>, <33 1>, <34 1>, <35 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x4035c100 0x100>; status = "disabled"; diff --git a/dts/bindings/interrupt-controller/renesas,ra-interrupt-controller.yaml b/dts/bindings/interrupt-controller/renesas,ra-interrupt-controller.yaml new file mode 100644 index 00000000000000..91dd3e9e65b049 --- /dev/null +++ b/dts/bindings/interrupt-controller/renesas,ra-interrupt-controller.yaml @@ -0,0 +1,19 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +description: Renesas RA series interrupt controller + +compatible: "renesas,ra-interrupt-controller" + +include: [interrupt-controller.yaml, base.yaml] + +properties: + reg: + required: true + + "#interrupt-cells": + const: 2 + +interrupt-cells: + - irq + - priority diff --git a/include/zephyr/dt-bindings/interrupt-controller/renesas-ra-interrupt.h b/include/zephyr/dt-bindings/interrupt-controller/renesas-ra-interrupt.h new file mode 100644 index 00000000000000..79962467e62f66 --- /dev/null +++ b/include/zephyr/dt-bindings/interrupt-controller/renesas-ra-interrupt.h @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_DT_BINDINGS_INTERRUPT_CONTROLLER_RENESAS_RA_INTERRUPT_H_ +#define ZEPHYR_DT_BINDINGS_INTERRUPT_CONTROLLER_RENESAS_RA_INTERRUPT_H_ + +/* When using macros in the device tree, the interrupt numbers will be + * automatically filled in by the script. + */ +#define RA_ICU_UNSPECIFIED (0xff) + +#endif /* ZEPHYR_DT_BINDINGS_INTERRUPT_CONTROLLER_RENESAS_RA_INTERRUPT_H_ */ From 3876c5353917e4b2292e4ec2b4a2b95d1f8a76ae Mon Sep 17 00:00:00 2001 From: Tran Van Quy Date: Wed, 18 Sep 2024 13:38:08 +0700 Subject: [PATCH 3/5] dts: renesas: Update interrupt ID in dts for Renesas RA6 series This update is to adapt the change for handling interrupt id allocation Signed-off-by: Tran Van Quy --- dts/arm/renesas/ra/ra6/r7fa6e10x.dtsi | 12 ++++++--- dts/arm/renesas/ra/ra6/r7fa6m2af3cfb.dtsi | 2 +- dts/arm/renesas/ra/ra6/r7fa6m2ax.dtsi | 9 ++++--- dts/arm/renesas/ra/ra6/r7fa6m3ax.dtsi | 9 ++++--- dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi | 24 +++++++++++------ dts/arm/renesas/ra/ra6/r7fa6m5xh.dtsi | 24 +++++++++++------ dts/arm/renesas/ra/ra6/ra6-cm33-common.dtsi | 16 ++++++++--- dts/arm/renesas/ra/ra6/ra6-cm4-common.dtsi | 30 ++++++++++++++++----- 8 files changed, 89 insertions(+), 37 deletions(-) diff --git a/dts/arm/renesas/ra/ra6/r7fa6e10x.dtsi b/dts/arm/renesas/ra/ra6/r7fa6e10x.dtsi index b92f8a3ead6027..4e59522978dea3 100644 --- a/dts/arm/renesas/ra/ra6/r7fa6e10x.dtsi +++ b/dts/arm/renesas/ra/ra6/r7fa6e10x.dtsi @@ -36,7 +36,8 @@ sci1: sci1@40118100 { compatible = "renesas,ra-sci"; - interrupts = <4 1>, <5 1>, <6 1>, <7 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118100 0x100>; clocks = <&pclka MSTPB 30>; @@ -50,7 +51,8 @@ sci2: sci2@40118200 { compatible = "renesas,ra-sci"; - interrupts = <8 1>, <9 1>, <10 1>, <11 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118200 0x100>; clocks = <&pclka MSTPB 29>; @@ -64,7 +66,8 @@ sci3: sci3@40118300 { compatible = "renesas,ra-sci"; - interrupts = <12 1>, <13 1>, <14 1>, <15 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118300 0x100>; clocks = <&pclka MSTPB 28>; @@ -78,7 +81,8 @@ sci4: sci4@40118400 { compatible = "renesas,ra-sci"; - interrupts = <16 1>, <17 1>, <18 1>, <19 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118400 0x100>; clocks = <&pclka MSTPB 27>; diff --git a/dts/arm/renesas/ra/ra6/r7fa6m2af3cfb.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m2af3cfb.dtsi index 4a3320b2bbb9ac..2bea9d4995062f 100644 --- a/dts/arm/renesas/ra/ra6/r7fa6m2af3cfb.dtsi +++ b/dts/arm/renesas/ra/ra6/r7fa6m2af3cfb.dtsi @@ -13,7 +13,7 @@ reg = <0x407e0000 0x10000>; #address-cells = <1>; #size-cells = <1>; - interrupts = <4 1>, <5 1>; + interrupts = , ; interrupt-names = "frdyi", "fiferr"; flash0: flash@0 { diff --git a/dts/arm/renesas/ra/ra6/r7fa6m2ax.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m2ax.dtsi index 5843d6c7ce899c..bdceb2451ee5dd 100644 --- a/dts/arm/renesas/ra/ra6/r7fa6m2ax.dtsi +++ b/dts/arm/renesas/ra/ra6/r7fa6m2ax.dtsi @@ -16,7 +16,8 @@ sci5: sci5@400700a0 { compatible = "renesas,ra-sci"; - interrupts = <20 1>, <21 1>, <22 1>, <23 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x400700a0 0x20>; clocks = <&pclka MSTPB 26>; @@ -30,7 +31,8 @@ sci6: sci6@400700c0 { compatible = "renesas,ra-sci"; - interrupts = <24 1>, <25 1>, <26 1>, <27 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x400700c0 0x20>; clocks = <&pclka MSTPB 25>; @@ -44,7 +46,8 @@ sci7: sci7@400700e0 { compatible = "renesas,ra-sci"; - interrupts = <28 1>, <29 1>, <30 1>, <31 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x400700e0 0x20>; clocks = <&pclka MSTPB 24>; diff --git a/dts/arm/renesas/ra/ra6/r7fa6m3ax.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m3ax.dtsi index cf3d8e97bce711..ea4a3c7400c6e9 100644 --- a/dts/arm/renesas/ra/ra6/r7fa6m3ax.dtsi +++ b/dts/arm/renesas/ra/ra6/r7fa6m3ax.dtsi @@ -56,7 +56,8 @@ sci5: sci5@400700a0 { compatible = "renesas,ra-sci"; - interrupts = <20 1>, <21 1>, <22 1>, <23 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x400700a0 0x20>; clocks = <&pclka MSTPB 26>; @@ -70,7 +71,8 @@ sci6: sci6@400700c0 { compatible = "renesas,ra-sci"; - interrupts = <24 1>, <25 1>, <26 1>, <27 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x400700c0 0x20>; clocks = <&pclka MSTPB 25>; @@ -84,7 +86,8 @@ sci7: sci7@400700e0 { compatible = "renesas,ra-sci"; - interrupts = <28 1>, <29 1>, <30 1>, <31 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x400700e0 0x20>; clocks = <&pclka MSTPB 24>; diff --git a/dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi index 3c5c308fb81623..1390018b376c66 100644 --- a/dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi +++ b/dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi @@ -16,7 +16,8 @@ sci1: sci1@40118100 { compatible = "renesas,ra-sci"; - interrupts = <4 1>, <5 1>, <6 1>, <7 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118100 0x100>; clocks = <&pclka MSTPB 30>; @@ -30,7 +31,8 @@ sci2: sci2@40118200 { compatible = "renesas,ra-sci"; - interrupts = <8 1>, <9 1>, <10 1>, <11 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118200 0x100>; clocks = <&pclka MSTPB 29>; @@ -44,7 +46,8 @@ sci3: sci3@40118300 { compatible = "renesas,ra-sci"; - interrupts = <12 1>, <13 1>, <14 1>, <15 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118300 0x100>; clocks = <&pclka MSTPB 28>; @@ -58,7 +61,8 @@ sci4: sci4@40118400 { compatible = "renesas,ra-sci"; - interrupts = <16 1>, <17 1>, <18 1>, <19 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118400 0x100>; clocks = <&pclka MSTPB 27>; @@ -72,7 +76,8 @@ sci5: sci5@40118500 { compatible = "renesas,ra-sci"; - interrupts = <20 1>, <21 1>, <22 1>, <23 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118500 0x100>; clocks = <&pclka MSTPB 26>; @@ -86,7 +91,8 @@ sci6: sci6@40118600 { compatible = "renesas,ra-sci"; - interrupts = <24 1>, <25 1>, <26 1>, <27 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118600 0x100>; clocks = <&pclka MSTPB 25>; @@ -100,7 +106,8 @@ sci7: sci7@40118700 { compatible = "renesas,ra-sci"; - interrupts = <28 1>, <29 1>, <30 1>, <31 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118700 0x100>; clocks = <&pclka MSTPB 24>; @@ -114,7 +121,8 @@ sci8: sci8@40118800 { compatible = "renesas,ra-sci"; - interrupts = <32 1>, <33 1>, <34 1>, <35 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118800 0x100>; clocks = <&pclka MSTPB 23>; diff --git a/dts/arm/renesas/ra/ra6/r7fa6m5xh.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m5xh.dtsi index 2b1fe78cbd21c0..ee0032c77afae7 100644 --- a/dts/arm/renesas/ra/ra6/r7fa6m5xh.dtsi +++ b/dts/arm/renesas/ra/ra6/r7fa6m5xh.dtsi @@ -76,7 +76,8 @@ sci1: sci1@40118100 { compatible = "renesas,ra-sci"; - interrupts = <4 1>, <5 1>, <6 1>, <7 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118100 0x100>; clocks = <&pclka MSTPB 30>; @@ -90,7 +91,8 @@ sci2: sci2@40118200 { compatible = "renesas,ra-sci"; - interrupts = <8 1>, <9 1>, <10 1>, <11 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118200 0x100>; clocks = <&pclka MSTPB 29>; @@ -104,7 +106,8 @@ sci3: sci3@40118300 { compatible = "renesas,ra-sci"; - interrupts = <12 1>, <13 1>, <14 1>, <15 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118300 0x100>; clocks = <&pclka MSTPB 28>; @@ -118,7 +121,8 @@ sci4: sci4@40118400 { compatible = "renesas,ra-sci"; - interrupts = <16 1>, <17 1>, <18 1>, <19 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118400 0x100>; clocks = <&pclka MSTPB 27>; @@ -132,7 +136,8 @@ sci5: sci5@40118500 { compatible = "renesas,ra-sci"; - interrupts = <20 1>, <21 1>, <22 1>, <23 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118500 0x100>; clocks = <&pclka MSTPB 26>; @@ -146,7 +151,8 @@ sci6: sci6@40118600 { compatible = "renesas,ra-sci"; - interrupts = <24 1>, <25 1>, <26 1>, <27 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118600 0x100>; clocks = <&pclka MSTPB 25>; @@ -160,7 +166,8 @@ sci7: sci7@40118700 { compatible = "renesas,ra-sci"; - interrupts = <28 1>, <29 1>, <30 1>, <31 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118700 0x100>; clocks = <&pclka MSTPB 24>; @@ -174,7 +181,8 @@ sci8: sci8@40118800 { compatible = "renesas,ra-sci"; - interrupts = <32 1>, <33 1>, <34 1>, <35 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118800 0x100>; clocks = <&pclka MSTPB 23>; diff --git a/dts/arm/renesas/ra/ra6/ra6-cm33-common.dtsi b/dts/arm/renesas/ra/ra6/ra6-cm33-common.dtsi index 2f9a4f0364029d..29451c8d66bd21 100644 --- a/dts/arm/renesas/ra/ra6/ra6-cm33-common.dtsi +++ b/dts/arm/renesas/ra/ra6/ra6-cm33-common.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include / { cpus { @@ -30,7 +31,14 @@ }; soc { - interrupt-parent = <&nvic>; + interrupt-parent = <&icu>; + icu: interrupt-controller@40006000 { + compatible = "renesas,ra-interrupt-controller"; + reg = <0x40006000 0x40>; + reg-names = "icu"; + interrupt-controller; + #interrupt-cells = <2>; + }; system: system@4001e000 { compatible = "renesas,ra-system"; @@ -106,7 +114,8 @@ sci0: sci0@40118000 { compatible = "renesas,ra-sci"; - interrupts = <0 1>, <1 1>, <2 1>, <3 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118000 0x100>; clocks = <&pclka MSTPB 31>; @@ -120,7 +129,8 @@ sci9: sci9@40118900 { compatible = "renesas,ra-sci"; - interrupts = <36 1>, <37 1>, <38 1>, <39 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118900 0x100>; clocks = <&pclka MSTPB 22>; diff --git a/dts/arm/renesas/ra/ra6/ra6-cm4-common.dtsi b/dts/arm/renesas/ra/ra6/ra6-cm4-common.dtsi index f28cbaafa6ecdd..2471660843582e 100644 --- a/dts/arm/renesas/ra/ra6/ra6-cm4-common.dtsi +++ b/dts/arm/renesas/ra/ra6/ra6-cm4-common.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include / { cpus { @@ -30,6 +31,14 @@ }; soc { + interrupt-parent = <&icu>; + icu: interrupt-controller@40006000 { + compatible = "renesas,ra-interrupt-controller"; + reg = <0x40006000 0x40>; + reg-names = "icu"; + interrupt-controller; + #interrupt-cells = <2>; + }; system: system@4001e000 { compatible = "renesas,ra-system"; @@ -125,7 +134,8 @@ sci0: sci0@40070000 { compatible = "renesas,ra-sci"; - interrupts = <0 1>, <1 1>, <2 1>, <3 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070000 0x20>; clocks = <&pclka MSTPB 31>; @@ -139,7 +149,8 @@ sci1: sci1@40070020 { compatible = "renesas,ra-sci"; - interrupts = <4 1>, <5 1>, <6 1>, <7 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070020 0x20>; clocks = <&pclka MSTPB 30>; @@ -153,7 +164,8 @@ sci2: sci2@40070040 { compatible = "renesas,ra-sci"; - interrupts = <8 1>, <9 1>, <10 1>, <11 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070040 0x20>; clocks = <&pclka MSTPB 29>; @@ -167,7 +179,8 @@ sci3: sci3@40070060 { compatible = "renesas,ra-sci"; - interrupts = <12 1>, <13 1>, <14 1>, <15 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070060 0x20>; clocks = <&pclka MSTPB 27>; @@ -181,7 +194,8 @@ sci4: sci4@40070080 { compatible = "renesas,ra-sci"; - interrupts = <16 1>, <17 1>, <18 1>, <19 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070080 0x20>; clocks = <&pclka MSTPB 26>; @@ -195,7 +209,8 @@ sci8: sci8@40070100 { compatible = "renesas,ra-sci"; - interrupts = <32 1>, <33 1>, <34 1>, <35 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070100 0x20>; clocks = <&pclka MSTPB 23>; @@ -209,7 +224,8 @@ sci9: sci9@40070120 { compatible = "renesas,ra-sci"; - interrupts = <36 1>, <37 1>, <38 1>, <39 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070120 0x20>; clocks = <&pclka MSTPB 22>; From 5433a89147e7063061065a94e02b6cabc1e555a9 Mon Sep 17 00:00:00 2001 From: Tran Van Quy Date: Wed, 18 Sep 2024 13:40:31 +0700 Subject: [PATCH 4/5] dts: renesas: Update interrupt ID in dts for Renesas RA4 series This update is to adapt the change for handling interrupt id allocation Signed-off-by: Tran Van Quy --- dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi | 12 ++++++++---- dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi | 12 ++++++++---- dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi | 3 ++- dts/arm/renesas/ra/ra4/ra4-cm33-common.dtsi | 16 +++++++++++++--- dts/arm/renesas/ra/ra4/ra4-cm4-common.dtsi | 19 ++++++++++++++++--- 5 files changed, 47 insertions(+), 15 deletions(-) diff --git a/dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi b/dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi index d3e763b6e9ad1b..a8da8daea0a1fd 100644 --- a/dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi +++ b/dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi @@ -36,7 +36,8 @@ sci1: sci1@40118100 { compatible = "renesas,ra-sci"; - interrupts = <4 1>, <5 1>, <6 1>, <7 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118100 0x100>; clocks = <&pclka MSTPB 30>; @@ -50,7 +51,8 @@ sci2: sci2@40118200 { compatible = "renesas,ra-sci"; - interrupts = <8 1>, <9 1>, <10 1>, <11 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118200 0x100>; clocks = <&pclka MSTPB 29>; @@ -64,7 +66,8 @@ sci3: sci3@40118300 { compatible = "renesas,ra-sci"; - interrupts = <12 1>, <13 1>, <14 1>, <15 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118300 0x100>; clocks = <&pclka MSTPB 28>; @@ -78,7 +81,8 @@ sci4: sci4@40118400 { compatible = "renesas,ra-sci"; - interrupts = <16 1>, <17 1>, <18 1>, <19 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118400 0x100>; clocks = <&pclka MSTPB 27>; diff --git a/dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi b/dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi index 524ac632241065..c808133ad32517 100644 --- a/dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi +++ b/dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi @@ -46,7 +46,8 @@ sci1: sci1@40118100 { compatible = "renesas,ra-sci"; - interrupts = <4 1>, <5 1>, <6 1>, <7 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118100 0x100>; clocks = <&pclka MSTPB 30>; @@ -60,7 +61,8 @@ sci2: sci2@40118200 { compatible = "renesas,ra-sci"; - interrupts = <8 1>, <9 1>, <10 1>, <11 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118200 0x100>; clocks = <&pclka MSTPB 29>; @@ -74,7 +76,8 @@ sci3: sci3@40118300 { compatible = "renesas,ra-sci"; - interrupts = <12 1>, <13 1>, <14 1>, <15 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118300 0x100>; clocks = <&pclka MSTPB 28>; @@ -88,7 +91,8 @@ sci4: sci4@40118400 { compatible = "renesas,ra-sci"; - interrupts = <16 1>, <17 1>, <18 1>, <19 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118400 0x100>; clocks = <&pclka MSTPB 27>; diff --git a/dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi b/dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi index 2be6da132529ba..061632bc65c610 100644 --- a/dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi +++ b/dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi @@ -23,7 +23,8 @@ sci4: sci4@40070080 { compatible = "renesas,ra-sci"; - interrupts = <16 1>, <17 1>, <18 1>, <19 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070080 0x20>; clocks = <&pclka MSTPB 26>; diff --git a/dts/arm/renesas/ra/ra4/ra4-cm33-common.dtsi b/dts/arm/renesas/ra/ra4/ra4-cm33-common.dtsi index f7959fc898d9e3..5a3bf78ab3e6b9 100644 --- a/dts/arm/renesas/ra/ra4/ra4-cm33-common.dtsi +++ b/dts/arm/renesas/ra/ra4/ra4-cm33-common.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include / { cpus { @@ -29,7 +30,14 @@ }; soc { - interrupt-parent = <&nvic>; + interrupt-parent = <&icu>; + icu: interrupt-controller@40006000 { + compatible = "renesas,ra-interrupt-controller"; + reg = <0x40006000 0x40>; + reg-names = "icu"; + interrupt-controller; + #interrupt-cells = <2>; + }; system: system@4001e000 { compatible = "renesas,ra-system"; @@ -111,7 +119,8 @@ sci0: sci0@40118000 { compatible = "renesas,ra-sci"; - interrupts = <0 1>, <1 1>, <2 1>, <3 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118000 0x100>; clocks = <&pclka MSTPB 31>; @@ -125,7 +134,8 @@ sci9: sci9@40118900 { compatible = "renesas,ra-sci"; - interrupts = <36 1>, <37 1>, <38 1>, <39 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40118900 0x100>; clocks = <&pclka MSTPB 22>; diff --git a/dts/arm/renesas/ra/ra4/ra4-cm4-common.dtsi b/dts/arm/renesas/ra/ra4/ra4-cm4-common.dtsi index 69a90813f1e530..e04fafd73d5bfd 100644 --- a/dts/arm/renesas/ra/ra4/ra4-cm4-common.dtsi +++ b/dts/arm/renesas/ra/ra4/ra4-cm4-common.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include / { cpus { @@ -30,6 +31,15 @@ }; soc { + interrupt-parent = <&icu>; + icu: interrupt-controller@40006000 { + compatible = "renesas,ra-interrupt-controller"; + reg = <0x40006000 0x40>; + reg-names = "icu"; + interrupt-controller; + #interrupt-cells = <2>; + }; + system: system@4001e000 { compatible = "renesas,ra-system"; reg = <0x4001e000 0x1000>; @@ -120,7 +130,8 @@ sci0: sci0@40070000 { compatible = "renesas,ra-sci"; - interrupts = <0 1>, <1 1>, <2 1>, <3 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070000 0x20>; clocks = <&pclka MSTPB 31>; @@ -134,7 +145,8 @@ sci1: sci1@40070020 { compatible = "renesas,ra-sci"; - interrupts = <4 1>, <5 1>, <6 1>, <7 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070020 0x20>; clocks = <&pclka MSTPB 30>; @@ -148,7 +160,8 @@ sci9: sci9@40070120 { compatible = "renesas,ra-sci"; - interrupts = <36 1>, <37 1>, <38 1>, <39 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070120 0x20>; clocks = <&pclka MSTPB 22>; From 1400f53fc902d8a1399f233503748ea37762a260 Mon Sep 17 00:00:00 2001 From: Tran Van Quy Date: Wed, 18 Sep 2024 13:42:06 +0700 Subject: [PATCH 5/5] dts: renesas: Update interrupt ID in dts for RA2A1 This update is to adapt the change for handling interrupt id allocation Signed-off-by: Tran Van Quy --- dts/arm/renesas/ra/ra2/ra2xx.dtsi | 25 ++++++++++++++++++++----- 1 file changed, 20 insertions(+), 5 deletions(-) diff --git a/dts/arm/renesas/ra/ra2/ra2xx.dtsi b/dts/arm/renesas/ra/ra2/ra2xx.dtsi index 5839795b2be236..42453e4e03f8c5 100644 --- a/dts/arm/renesas/ra/ra2/ra2xx.dtsi +++ b/dts/arm/renesas/ra/ra2/ra2xx.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include / { cpus { @@ -23,6 +24,15 @@ }; soc { + interrupt-parent = <&icu>; + icu: interrupt-controller@40006000 { + compatible = "renesas,ra-interrupt-controller"; + reg = <0x40006000 0x40>; + reg-names = "icu"; + interrupt-controller; + #interrupt-cells = <2>; + }; + system: system@4001e000 { compatible = "renesas,ra-system"; reg = <0x4001e000 0x1000>; @@ -137,7 +147,8 @@ sci0: sci@40070000 { compatible = "renesas,ra-sci"; - interrupts = <4 1>, <5 1>, <6 1>, <7 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070000 0x20>; clocks = <&pclkb MSTPB 31>; @@ -151,7 +162,8 @@ sci1: sci@40070020 { compatible = "renesas,ra-sci"; - interrupts = <8 1>, <9 1>, <10 1>, <11 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070020 0x20>; clocks = <&pclkb MSTPB 30>; @@ -165,7 +177,8 @@ sci2: sci@40070040 { compatible = "renesas,ra-sci"; - interrupts = <12 1>, <13 1>, <14 1>, <15 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070040 0x20>; clocks = <&pclkb MSTPB 29>; @@ -179,7 +192,8 @@ sci3: sci@40070060 { compatible = "renesas,ra-sci"; - interrupts = <16 1>, <17 1>, <18 1>, <19 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070060 0x20>; clocks = <&pclkb MSTPB 28>; @@ -193,7 +207,8 @@ sci9: sci@40070120 { compatible = "renesas,ra-sci"; - interrupts = <24 1>, <25 1>, <26 1>, <27 1>; + interrupts = , , + , ; interrupt-names = "rxi", "txi", "tei", "eri"; reg = <0x40070120 0x20>; clocks = <&pclkb MSTPB 22>;