Merge branch '86Box:master' into master

src/cdrom/cdrom.c

@@ -1952,8 +1952,18 @@ cdrom_hard_reset(void)
 
  dev->cd_status = CD_STATUS_EMPTY;
 
- if (dev->host_drive == 200)
+ if (dev->host_drive == 200) {
+#ifdef _WIN32
+ if ((strlen(dev->image_path) >= 1) && (dev->image_path[strlen(dev->image_path) - 1] == '/'))
+ dev->image_path[strlen(dev->image_path) - 1] = '\\';
+#else
+ if ((strlen(dev->image_path) >= 1) &&
+ (dev->image_path[strlen(dev->image_path) - 1] == '\\'))
+ dev->image_path[strlen(dev->image_path) - 1] = '/';
+#endif
+
  cdrom_image_open(dev, dev->image_path);
+ }
  }
  }
 
@@ -2042,6 +2052,15 @@ cdrom_reload(uint8_t id)
  if (dev->prev_host_drive == 200) {
  /* Reload a previous image. */
  strcpy(dev->image_path, dev->prev_image_path);
+
+#ifdef _WIN32
+ if ((strlen(dev->image_path) >= 1) && (dev->image_path[strlen(dev->image_path) - 1] == '/'))
+ dev->image_path[strlen(dev->image_path) - 1] = '\\';
+#else
+ if ((strlen(dev->image_path) >= 1) && (dev->image_path[strlen(dev->image_path) - 1] == '\\'))
+ dev->image_path[strlen(dev->image_path) - 1] = '/';
+#endif
+
  cdrom_image_open(dev, dev->image_path);
 
  cdrom_insert(id);

src/cpu/386.c

@@ -240,6 +240,7 @@ exec386_2386(int32_t cycs)
  cycdiff = 0;
  oldcyc = cycles;
  while (cycdiff < cycle_period) {
+ int ins_fetch_fault = 0;
  ins_cycles = cycles;
 
 #ifndef USE_NEW_DYNAREC
@@ -259,6 +260,14 @@ exec386_2386(int32_t cycs)
  fetchdat = fastreadl_fetch(cs + cpu_state.pc);
  ol = opcode_length[fetchdat & 0xff];
  CHECK_READ_CS(MIN(ol, 4));
+ ins_fetch_fault = cpu_386_check_instruction_fault();
+
+ if (!cpu_state.abrt && ins_fetch_fault) {
+ x86gen();
+ ins_fetch_fault = 0;
+ /* No instructions executed at this point. */
+ goto block_ended;
+ }
 
  if (!cpu_state.abrt) {
 #ifdef ENABLE_386_LOG
@@ -267,7 +276,7 @@ exec386_2386(int32_t cycs)
 #endif
  opcode = fetchdat & 0xFF;
  fetchdat >>= 8;
- trap = cpu_state.flags & T_FLAG;
+ trap |= !!(cpu_state.flags & T_FLAG);
 
  cpu_state.pc++;
  x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat);
@@ -287,6 +296,7 @@ exec386_2386(int32_t cycs)
  if (cpu_end_block_after_ins)
  cpu_end_block_after_ins--;
 
+block_ended:
  if (cpu_state.abrt) {
  flags_rebuild();
  tempi = cpu_state.abrt & ABRT_MASK;
@@ -309,14 +319,17 @@ exec386_2386(int32_t cycs)
 #endif
  }
  }
+ if (!x86_was_reset && ins_fetch_fault)
+ x86gen(); /* This is supposed to be the first one serviced by the processor according to the manual. */
  } else if (trap) {
  flags_rebuild();
+ if (trap & 2) dr[6] |= 0x8000;
+ if (trap & 1) dr[6] |= 0x4000;
  trap = 0;
 #ifndef USE_NEW_DYNAREC
  oldcs = CS;
 #endif
  cpu_state.oldpc = cpu_state.pc;
- dr[6] |= 0x4000;
  x86_int(1);
  }
 

src/cpu/386_common.c

@@ -80,6 +80,7 @@ int smm_in_hlt = 0;
 int smi_block = 0;
 
 int prefetch_prefixes = 0;
+int rf_flag_no_clear = 0;
 
 int tempc;
 int oldcpl;
@@ -1491,7 +1492,7 @@ x86_int_sw(int num)
  }
  }
 
- trap = 0;
+ trap &= ~1;
  CPU_BLOCK_END();
 }
 
@@ -1534,7 +1535,7 @@ x86_int_sw_rm(int num)
 #endif
 
  cycles -= timing_int_rm;
- trap = 0;
+ trap &= ~1;
  CPU_BLOCK_END();
 
  return 0;
@@ -1655,6 +1656,37 @@ cpu_386_flags_rebuild(void)
  flags_rebuild();
 }
 
+extern uint64_t mmutranslate_noabrt_2386(uint32_t addr, int rw);
+int
+cpu_386_check_instruction_fault(void)
+{
+ int i = 0;
+ int fault = 0;
+ /* Report no fault if RF is set. */
+ if (cpu_state.eflags & RF_FLAG)
+ return 0;
+
+ /* Make sure breakpoints are enabled. */
+ if (!(dr[7] & 0xFF))
+ return 0;
+
+ for (i = 0; i < 4; i++) {
+ int breakpoint_enabled = !!(dr[7] & (0x3 << (2 * i))) && !(dr[7] & (0x30000 << (4 * i)));
+ uint32_t translated_addr = 0xffffffff;
+ if (!breakpoint_enabled)
+ continue;
+
+ translated_addr = dr[i];
+
+ if ((cs + cpu_state.pc) == (uint32_t)translated_addr) {
+ dr[6] |= (1 << i);
+ fault = 1;
+ }
+ }
+
+ return fault;
+}
+
 int
 sysenter(uint32_t fetchdat)
 {

src/cpu/386_common.h

@@ -674,3 +674,8 @@ seteaq(uint64_t v)
  cpu_state.pc += 2
 
 #endif
+
+/* Resume Flag handling. */
+extern int rf_flag_no_clear;
+
+int cpu_386_check_instruction_fault(void);

src/cpu/386_dynarec.c

@@ -268,6 +268,12 @@ exec386_dynarec_int(void)
  cpu_block_end = 0;
  x86_was_reset = 0;
 
+ if (trap == 2) {
+ /* Handle the T bit in the new TSS first. */
+ CPU_BLOCK_END();
+ goto block_ended;
+ }
+
  while (!cpu_block_end) {
 # ifndef USE_NEW_DYNAREC
  oldcs = CS;
@@ -321,13 +327,14 @@ exec386_dynarec_int(void)
  CPU_BLOCK_END();
  }
 
+block_ended:
  if (!cpu_state.abrt && trap) {
+ dr[6] |= (trap == 2) ? 0x8000 : 0x4000;
  trap = 0;
 # ifndef USE_NEW_DYNAREC
  oldcs = CS;
 # endif
  cpu_state.oldpc = cpu_state.pc;
- dr[6] |= 0x4000;
  x86_int(1);
  }
 
@@ -542,7 +549,7 @@ exec386_dynarec_dyn(void)
 # endif
  CPU_BLOCK_END();
 
- if (cpu_state.flags & T_FLAG)
+ if ((cpu_state.flags & T_FLAG) || (trap == 2))
  CPU_BLOCK_END();
  if (smi_line)
  CPU_BLOCK_END();

src/cpu/386_ops.h

@@ -181,7 +181,11 @@ extern void x386_dynarec_log(const char *fmt, ...);
 #ifndef OPS_286_386
 # include "x86_ops_cyrix.h"
 #endif
-#include "x86_ops_flag.h"
+#ifdef OPS_286_386
+# include "x86_ops_flag_2386.h"
+#else
+# include "x86_ops_flag.h"
+#endif
 #include "x86_ops_fpu.h"
 #include "x86_ops_inc_dec.h"
 #include "x86_ops_int.h"
@@ -200,7 +204,11 @@ extern void x386_dynarec_log(const char *fmt, ...);
 # include "x86_ops_mmx_shift.h"
 #endif
 #include "x86_ops_mov.h"
-#include "x86_ops_mov_ctrl.h"
+#ifdef OPS_286_386
+# include "x86_ops_mov_ctrl_2386.h"
+#else
+# include "x86_ops_mov_ctrl.h"
+#endif
 #include "x86_ops_mov_seg.h"
 #include "x86_ops_movx.h"
 #ifndef OPS_286_386
@@ -218,7 +226,11 @@ extern void x386_dynarec_log(const char *fmt, ...);
 # include "x86_ops_rep.h"
 # endif
 #endif
-#include "x86_ops_ret.h"
+#ifdef OPS_286_386
+# include "x86_ops_ret_2386.h"
+#else
+# include "x86_ops_ret.h"
+#endif
 #include "x86_ops_set.h"
 #include "x86_ops_stack.h"
 #ifdef OPS_286_386

src/cpu/808x.c

@@ -563,9 +563,10 @@ reset_808x(int hard)
  _opseg[3] = &cpu_state.seg_ds;
 
  pfq_size = (is8086) ? 6 : 4;
- pfq_clear();
  }
 
+ pfq_clear();
+
  load_cs(0xFFFF);
  cpu_state.pc = 0;
  if (is_nec)