Increase in PCIe table size (#451)

- Increase in PCIe table size to accomodate for 40 RC Signed-off-by: Sujana M <sujana.murali@arm.com>
ARM-software · Apr 23, 2024 · a68d837 · a68d837
1 parent f569bcb
commit a68d837
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/uefi_app/SbsaAvs.h b/uefi_app/SbsaAvs.h
@@ -51,7 +51,7 @@
  #define PERIPHERAL_INFO_TBL_SZ 2048 /*Supports maximum 20 PCIe EPs */
  /*(USB and SATA controllers only) */
  /*[56 B Each + 16 B Header]*/
- #define PCIE_INFO_TBL_SZ 512  /*Supports maximum 20 RC's*/
+ #define PCIE_INFO_TBL_SZ 1024 /*Supports maximum 40 RC's*/
  /*[24 B Each + 4 B Header]*/
  #define PMU_INFO_TBL_SZ 20496 /*Supports maximum 512 PMUs*/
  /*[40 B Each + 4 B Header]*/