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cmsis_uart: use CMSIS UART driver for kl27z
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@mbrossard
mbrossard committed Feb 14, 2024
1 parent c71a02a commit 1d01058
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Showing 19 changed files with 8,425 additions and 423 deletions.
1 change: 1 addition & 0 deletions records/hic_hal/kl27z.yaml
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Expand Up @@ -22,6 +22,7 @@ common:
- source/hic_hal/freescale
- source/hic_hal/freescale/kl27z
- source/hic_hal/freescale/kl27z/MKL27Z4
- source/hic_hal/cmsis-driver/uart
fsl_flash_driver:
- source/hic_hal/freescale/iap

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1 change: 1 addition & 0 deletions source/board/microbitv2/i2c_commands.c
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Expand Up @@ -29,6 +29,7 @@
#include "storage.h"
#include "gpio_extra.h"
#include "microbitv2.h"
#include "util.h"


extern uint16_t board_id_hex;
Expand Down
22 changes: 11 additions & 11 deletions source/board/microbitv2/kl27z/IO_Config_Override.h
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Expand Up @@ -135,21 +135,21 @@ COMPILER_ASSERT(DAPLINK_HIC_ID == DAPLINK_HIC_ID_KL27Z);
// Target Running LED Not available

// UART
#define UART_PORT PORTA
#define UART_NUM (1)
// RX PTA18
#define PIN_UART_RX_GPIO PTA

// UART RX PTA18
#define PIN_UART_RX_PORT PORTA
#define PIN_UART_RX_BIT (18)
#define PIN_UART_RX (1<<PIN_UART_RX_BIT)
#define PIN_UART_RX_MUX_ALT (3)
// TX PTA19
#define PIN_UART_TX_GPIO PTA
#define PIN_UART_RX_MUX_ALT (kPORT_MuxAlt3)
// UART TX PTA19
#define PIN_UART_TX_PORT PORTA
#define PIN_UART_TX_BIT (19)
#define PIN_UART_TX (1<<PIN_UART_TX_BIT)
#define PIN_UART_TX_MUX_ALT (3)
#define PIN_UART_TX_MUX_ALT (kPORT_MuxAlt3)

#define UART LPUART1
#define UART_RX_TX_IRQn LPUART1_IRQn
#define UART_RX_TX_IRQHandler LPUART1_IRQHandler
// cmsis-driver/uart/uart.c configuration
#include "fsl_lpuart_cmsis.h"
#define CMSIS_UART_INSTANCE (Driver_USART1)
#define CMSIS_UART_IRQ (LPUART1_IRQn)

#endif
22 changes: 12 additions & 10 deletions source/board/microbitv2/kl27z/power.c
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Original file line number Diff line number Diff line change
Expand Up @@ -99,6 +99,8 @@ void PORTCD_IRQHandler(void)
{
PORT_ClearPinsInterruptFlags(PIN_WAKE_ON_EDGE_PORT, (1U << PIN_WAKE_ON_EDGE_BIT));

power_source = pwr_mon_get_power_source();

bool usb_on = (((PIN_WAKE_ON_EDGE_GPIO->PDIR) >> PIN_WAKE_ON_EDGE_BIT) & 0x01U) ? false : true;

if (usb_on == false) {
Expand All @@ -119,7 +121,7 @@ void power_init(void)
{
// Configure pin as GPIO
PORT_SetPinMux(PIN_WAKE_ON_EDGE_PORT, PIN_WAKE_ON_EDGE_BIT, kPORT_MuxAsGpio);

/* Power related. */
SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
if (kRCM_SourceWakeup & RCM_GetPreviousResetSources(RCM)) /* Wakeup from VLLS. */
Expand Down Expand Up @@ -214,22 +216,22 @@ static void power_pre_switch_hook(smc_power_state_t originPowerState, app_power_
// and consider waiting for the write buffer to empty too, but as this is our only call to uart_uninitialize()
// and we never get here with USB connected it may be unnecessary.
/* Wait for debug console output finished. */
while (!(LPUART_STAT_TC_MASK & UART->STAT))
while (!(LPUART_STAT_TC_MASK & LPUART1->STAT))
{
}
uart_uninitialize();

/* Disable pins to lower current leakage */
PORT_SetPinMux(UART_PORT, PIN_UART_RX_BIT, kPORT_PinDisabledOrAnalog);
PORT_SetPinMux(UART_PORT, PIN_UART_TX_BIT, kPORT_PinDisabledOrAnalog);
PORT_SetPinMux(PIN_UART_RX_PORT, PIN_UART_RX_BIT, kPORT_PinDisabledOrAnalog);
PORT_SetPinMux(PIN_UART_TX_PORT, PIN_UART_TX_BIT, kPORT_PinDisabledOrAnalog);
PORT_SetPinMux(PIN_HID_LED_PORT, PIN_HID_LED_BIT, kPORT_PinDisabledOrAnalog);

/* Disable I/O pin SWCLK */
PIN_SWCLK_PORT->PCR[PIN_SWCLK_BIT] = 0;

/* Disable I/O pin SWDIO */
PIN_SWDIO_PORT->PCR[PIN_SWDIO_BIT] = 0;

/* If targetMode is VLLS0, disable I2C pins */
if (kAPP_PowerModeVlls0 == targetMode)
{
Expand All @@ -252,10 +254,10 @@ static void power_post_switch_hook(smc_power_state_t originPowerState, app_power
PIN_SWDIO_PORT->PCR[PIN_SWDIO_BIT] = PORT_PCR_MUX(1) | /* GPIO */
PORT_PCR_PE_MASK | /* Pull enable */
PORT_PCR_PS_MASK; /* Pull-up */

/* re-configure pinmux of disabled pins */
PORT_SetPinMux(UART_PORT, PIN_UART_RX_BIT, (port_mux_t)PIN_UART_RX_MUX_ALT);
PORT_SetPinMux(UART_PORT, PIN_UART_TX_BIT, (port_mux_t)PIN_UART_TX_MUX_ALT);
PORT_SetPinMux(PIN_UART_RX_PORT, PIN_UART_RX_BIT, PIN_UART_RX_MUX_ALT);
PORT_SetPinMux(PIN_UART_TX_PORT, PIN_UART_TX_BIT, PIN_UART_TX_MUX_ALT);

uart_initialize();
// TODO: Check if this is necessary, when we have time to test. This has always been in the V2 code.
Expand Down
18 changes: 9 additions & 9 deletions source/hic_hal/freescale/kl27z/IO_Config.h
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Expand Up @@ -92,21 +92,21 @@ COMPILER_ASSERT(DAPLINK_HIC_ID == DAPLINK_HIC_ID_KL27Z);
#define SW_RESET_NOT_PRESSED (1)

// UART
#define UART_PORT PORTA
#define UART_NUM (1)
// RX PTA18
#define PIN_UART_RX_GPIO PTA

// UART RX PTA18
#define PIN_UART_RX_PORT PORTA
#define PIN_UART_RX_BIT (18)
#define PIN_UART_RX (1<<PIN_UART_RX_BIT)
#define PIN_UART_RX_MUX_ALT (3)
// TX PTA19
#define PIN_UART_TX_GPIO PTA
// UART TX PTA19
#define PIN_UART_TX_PORT PORTA
#define PIN_UART_TX_BIT (19)
#define PIN_UART_TX (1<<PIN_UART_TX_BIT)
#define PIN_UART_TX_MUX_ALT (3)

#define UART LPUART1
#define UART_RX_TX_IRQn LPUART1_IRQn
#define UART_RX_TX_IRQHandler LPUART1_IRQHandler
// cmsis-driver/uart/uart.c configuration
#include "fsl_lpuart_cmsis.h"
#define CMSIS_UART_INSTANCE (Driver_USART1)
#define CMSIS_UART_IRQ (LPUART1_IRQn)

#endif
107 changes: 46 additions & 61 deletions source/hic_hal/freescale/kl27z/MKL27Z4/fsl_clock.c
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Expand Up @@ -75,16 +75,19 @@ static uint8_t CLOCK_GetOscRangeFromFreq(uint32_t freq);
static uint32_t CLOCK_GetLircClkFreq(void)
{
static const uint32_t lircFreqs[] = {MCG_LIRC_FREQ1, MCG_LIRC_FREQ2};
uint32_t freq;

/* Check whether the LIRC is enabled. */
if ((MCG->C1 & MCG_C1_IRCLKEN_MASK) || (kMCGLITE_ClkSrcLirc == MCG_S_CLKST_VAL))
if (((MCG->C1 & MCG_C1_IRCLKEN_MASK) != 0U) || ((uint8_t)kMCGLITE_ClkSrcLirc == MCG_S_CLKST_VAL))
{
return lircFreqs[MCG_C2_IRCS_VAL];
freq = lircFreqs[MCG_C2_IRCS_VAL];
}
else
{
return 0U;
freq = 0U;
}

return freq;
}

static uint8_t CLOCK_GetOscRangeFromFreq(uint32_t freq)
Expand Down Expand Up @@ -114,16 +117,20 @@ static uint8_t CLOCK_GetOscRangeFromFreq(uint32_t freq)
*/
uint32_t CLOCK_GetOsc0ErClkFreq(void)
{
if (OSC0->CR & OSC_CR_ERCLKEN_MASK)
uint32_t freq;

if ((OSC0->CR & OSC_CR_ERCLKEN_MASK) != 0U)
{
/* Please call CLOCK_SetXtal0Freq base on board setting before using OSC0 clock. */
assert(g_xtal0Freq);
return g_xtal0Freq;
freq = g_xtal0Freq;
}
else
{
return 0U;
freq = 0U;
}

return freq;
}

/*!
Expand Down Expand Up @@ -162,7 +169,7 @@ uint32_t CLOCK_GetEr32kClkFreq(void)
*/
uint32_t CLOCK_GetPlatClkFreq(void)
{
return CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1);
return CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1U);
}

/*!
Expand All @@ -174,8 +181,8 @@ uint32_t CLOCK_GetFlashClkFreq(void)
{
uint32_t freq;

freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1);
freq /= (SIM_CLKDIV1_OUTDIV4_VAL + 1);
freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1U);
freq /= (SIM_CLKDIV1_OUTDIV4_VAL + 1U);

return freq;
}
Expand All @@ -189,8 +196,8 @@ uint32_t CLOCK_GetBusClkFreq(void)
{
uint32_t freq;

freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1);
freq /= (SIM_CLKDIV1_OUTDIV4_VAL + 1);
freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1U);
freq /= (SIM_CLKDIV1_OUTDIV4_VAL + 1U);

return freq;
}
Expand All @@ -202,7 +209,7 @@ uint32_t CLOCK_GetBusClkFreq(void)
*/
uint32_t CLOCK_GetCoreSysClkFreq(void)
{
return CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1);
return CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1U);
}

/*!
Expand All @@ -223,12 +230,12 @@ uint32_t CLOCK_GetFreq(clock_name_t clockName)
{
case kCLOCK_CoreSysClk:
case kCLOCK_PlatClk:
freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1);
freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1U);
break;
case kCLOCK_BusClk:
case kCLOCK_FlashClk:
freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1);
freq /= (SIM_CLKDIV1_OUTDIV4_VAL + 1);
freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1U);
freq /= (SIM_CLKDIV1_OUTDIV4_VAL + 1U);
break;
case kCLOCK_Er32kClk:
freq = CLOCK_GetEr32kClkFreq();
Expand Down Expand Up @@ -326,15 +333,19 @@ uint32_t CLOCK_GetInternalRefClkFreq(void)
*/
uint32_t CLOCK_GetPeriphClkFreq(void)
{
uint32_t freq;

/* Check whether the HIRC is enabled. */
if ((MCG->MC & MCG_MC_HIRCEN_MASK) || (kMCGLITE_ClkSrcHirc == MCG_S_CLKST_VAL))
if (((MCG->MC & MCG_MC_HIRCEN_MASK) != 0U) || ((uint8_t)kMCGLITE_ClkSrcHirc == MCG_S_CLKST_VAL))
{
return MCG_HIRC_FREQ;
freq = MCG_HIRC_FREQ;
}
else
{
return 0U;
freq = 0U;
}

return freq;
}

/*!
Expand All @@ -351,13 +362,13 @@ uint32_t CLOCK_GetOutClkFreq(void)

switch (MCG_S_CLKST_VAL)
{
case kMCGLITE_ClkSrcHirc:
case (uint8_t)kMCGLITE_ClkSrcHirc:
freq = MCG_HIRC_FREQ;
break;
case kMCGLITE_ClkSrcLirc:
case (uint8_t)kMCGLITE_ClkSrcLirc:
freq = CLOCK_GetLircClkFreq() >> MCG_SC_FCRDIV_VAL;
break;
case kMCGLITE_ClkSrcExt:
case (uint8_t)kMCGLITE_ClkSrcExt:
/* Please call CLOCK_SetXtal0Freq base on board setting before using OSC0 clock. */
assert(g_xtal0Freq);
freq = g_xtal0Freq;
Expand All @@ -383,11 +394,11 @@ mcglite_mode_t CLOCK_GetMode(void)

switch (MCG_S_CLKST_VAL)
{
case kMCGLITE_ClkSrcHirc: /* HIRC */
case (uint8_t)kMCGLITE_ClkSrcHirc: /* HIRC */
mode = kMCGLITE_ModeHirc48M;
break;
case kMCGLITE_ClkSrcLirc: /* LIRC */
if (kMCGLITE_Lirc2M == MCG_C2_IRCS_VAL)
case (uint8_t)kMCGLITE_ClkSrcLirc: /* LIRC */
if ((uint8_t)kMCGLITE_Lirc2M == MCG_C2_IRCS_VAL)
{
mode = kMCGLITE_ModeLirc2M;
}
Expand All @@ -396,7 +407,7 @@ mcglite_mode_t CLOCK_GetMode(void)
mode = kMCGLITE_ModeLirc8M;
}
break;
case kMCGLITE_ClkSrcExt: /* EXT */
case (uint8_t)kMCGLITE_ClkSrcExt: /* EXT */
mode = kMCGLITE_ModeExt;
break;
default:
Expand Down Expand Up @@ -424,34 +435,34 @@ status_t CLOCK_SetMcgliteConfig(mcglite_config_t const *targetConfig)
* If switch between LIRC8M and LIRC2M, need to switch to HIRC mode first,
* because could not switch directly.
*/
if ((kMCGLITE_ClkSrcLirc == MCG_S_CLKST_VAL) && (kMCGLITE_ClkSrcLirc == targetConfig->outSrc) &&
(MCG_C2_IRCS_VAL != targetConfig->ircs))
if (((uint8_t)kMCGLITE_ClkSrcLirc == MCG_S_CLKST_VAL) && (kMCGLITE_ClkSrcLirc == targetConfig->outSrc) &&
(MCG_C2_IRCS_VAL != (uint8_t)(targetConfig->ircs)))
{
MCG->C1 = (MCG->C1 & ~MCG_C1_CLKS_MASK) | MCG_C1_CLKS(kMCGLITE_ClkSrcHirc);
while (kMCGLITE_ClkSrcHirc != MCG_S_CLKST_VAL)
MCG->C1 = (uint8_t)((MCG->C1 & ~MCG_C1_CLKS_MASK) | MCG_C1_CLKS(kMCGLITE_ClkSrcHirc));
while ((uint8_t)kMCGLITE_ClkSrcHirc != MCG_S_CLKST_VAL)
{
}
}

/* Set configuration now. */
MCG->SC = MCG_SC_FCRDIV(targetConfig->fcrdiv);
MCG->MC = MCG_MC_HIRCEN(targetConfig->hircEnableInNotHircMode) | MCG_MC_LIRC_DIV2(targetConfig->lircDiv2);
MCG->C2 = (MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs);
MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs));
MCG->C1 = MCG_C1_CLKS(targetConfig->outSrc) | targetConfig->irclkEnableMode;

/*
* If external oscillator used and MCG_Lite is set to EXT mode, need to
* wait for the OSC stable.
*/
if ((MCG->C2 & MCG_C2_EREFS0_MASK) && (kMCGLITE_ClkSrcExt == targetConfig->outSrc))
if (((MCG->C2 & MCG_C2_EREFS0_MASK) != 0U) && (kMCGLITE_ClkSrcExt == targetConfig->outSrc))
{
while (!(MCG->S & MCG_S_OSCINIT0_MASK))
while (0U == (MCG->S & MCG_S_OSCINIT0_MASK))
{
}
}

/* Wait for clock source change completed. */
while (targetConfig->outSrc != MCG_S_CLKST_VAL)
while ((uint8_t)targetConfig->outSrc != MCG_S_CLKST_VAL)
{
}

Expand All @@ -474,10 +485,10 @@ void CLOCK_InitOsc0(osc_config_t const *config)

MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode);

if ((kOSC_ModeExt != config->workMode) && (OSC0->CR & OSC_CR_ERCLKEN_MASK))
if ((kOSC_ModeExt != config->workMode) && ((OSC0->CR & OSC_CR_ERCLKEN_MASK) != 0U))
{
/* Wait for stable. */
while (!(MCG->S & MCG_S_OSCINIT0_MASK))
while (0U == (MCG->S & MCG_S_OSCINIT0_MASK))
{
}
}
Expand All @@ -493,29 +504,3 @@ void CLOCK_DeinitOsc0(void)
OSC0->CR = 0U;
MCG->C2 &= MCG_C2_IRCS_MASK;
}

/*!
* brief Delay at least for several microseconds.
* Please note that, this API will calculate the microsecond period with the maximum devices
* supported CPU frequency, so this API will only delay for at least the given microseconds, if precise
* delay count was needed, please implement a new timer count to achieve this function.
*
* param delay_us Delay time in unit of microsecond.
*/
__attribute__((weak)) void SDK_DelayAtLeastUs(uint32_t delay_us)
{
assert(0U != delay_us);

uint32_t count = (uint32_t)USEC_TO_COUNT(delay_us, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);

/*
* Calculate the real delay count depend on the excute instructions cycles,
* users can change the divider value to adapt to the real IDE optimise level.
*/
count = (count / 4U);

for (; count > 0UL; count--)
{
__NOP();
}
}
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