Remove bitfile from uart daq args

Add OK device to docs
Add todos for docs to new meta category

docs/api/devices.md

@@ -0,0 +1,11 @@
+# Devices
+
+Interfaces to external devices like miniscopes and DAQs
+
+## OpalKelly
+
+```{eval-rst}
+.. autoclass:: miniscope_io.devices.opalkelly.okDev
+    :members:
+    :undoc-members:
+```

docs/api/index.md

@@ -4,6 +4,7 @@
 :caption: API
 
 data
+devices
 formats
 io
 sdcard

docs/conf.py

@@ -20,7 +20,8 @@
     'sphinx.ext.napoleon',
     'sphinx.ext.autodoc',
     'sphinxcontrib.autodoc_pydantic',
-    'sphinx.ext.intersphinx'
+    'sphinx.ext.intersphinx',
+    'sphinx.ext.todo'
 ]
 
 templates_path = ['_templates']
@@ -68,4 +69,7 @@
 # autodoc
 # Mock imports for packages we don't have yet - this one is
 # for opal kelley stuff we need to figure out the licensing for
-autodoc_mock_imports = ['routine']
+autodoc_mock_imports = ['routine']
+
+# todo
+todo_include_todos = True

docs/index.md

@@ -16,7 +16,12 @@ guide/index
 :caption: Contents:
 
 api/index
-changelog
+```
+
+```{toctree}
+:caption: Meta:
+
+meta/index
 ```
 
 

docs/meta/index.md

@@ -0,0 +1,8 @@
+# Meta
+
+
+```{toctree}
+changelog
+todo
+```
+

docs/meta/todo.md

@@ -0,0 +1,4 @@
+# TODO
+
+```{todolist}
+```

miniscope_io/devices/opalkelly.py

@@ -6,6 +6,15 @@
 
 
 class okDev(ok.okCFrontPanel):
+    """
+    I/O and configuration for an (what kind of opal kelly device?)
+
+    .. todo::
+
+        Phil: document what this thing does, including how bitfiles work
+        and how they're generated/where they're located.
+
+    """
     def __init__(self, serial_id: str = ""):
         super().__init__()
         ret = self.OpenBySerial("")
@@ -17,6 +26,7 @@ def __init__(self, serial_id: str = ""):
             print("Connected to {}".format(self.info.productName))
 
     def uploadBit(self, bit_file: str):
+
         ret = self.ConfigureFPGA(bit_file)
         if ret == self.NoError:
             print("Succesfully uploaded {}".format(bit_file))

miniscope_io/uart_daq.py

@@ -6,6 +6,7 @@
 import time
 from datetime import datetime
 import warnings
+from typing import Literal
 
 import coloredlogs
 import cv2
@@ -34,6 +35,14 @@
 
 
 class uart_daq:
+    """
+    A combined class for reading frames from a UART and FPGA source.
+
+    .. todo::
+
+        Phil/Takuya - docstrings for uart daq: what devices these correspond to, how to configure them, usage examples, tests
+
+    """
     def __init__(
         self,
         frame_width: int = 304,
@@ -121,7 +130,7 @@ def _uart_recv(self, serial_buffer_queue, comport: str, baudrate: int):
         sys.exit(1)
 
     def _fpga_recv(
-        self, serial_buffer_queue, bit_file, read_length=None, pre_first=True
+        self, serial_buffer_queue, read_length=None, pre_first=True
     ):
         if not HAVE_OK:
             raise RuntimeError('Couldnt import OpalKelly device. Check the docs for install instructions!')
@@ -147,7 +156,6 @@ def _fpga_recv(
         coloredlogs.install(level=logging.INFO, logger=locallogs)
         # set up fpga devices
         dev = okDev()
-        dev.uploadBit(bit_file)
         dev.setWire(0x00, 0b0010)
         time.sleep(0.01)
         dev.setWire(0x00, 0b0)
@@ -332,11 +340,10 @@ def _format_frame(self, frame_buffer_queue, imagearray):
     # COM port should probably be automatically found but not sure yet how to distinguish with other devices.
     def capture(
         self,
-        source: str,
+        source: Literal['uart', 'fpga'],
         comport: str = "COM3",
         baudrate: int = 1200000,
         mode: str = "DEBUG",
-        bit_file: str = "/Users/mbrosch/Downloads/USBInterface/USBInterface-6mhz-3v3-INVERSE.bit",
         read_length: int = None,
     ):
         logdirectories = [
@@ -388,10 +395,12 @@ def capture(
                 target=self._fpga_recv,
                 args=(
                     serial_buffer_queue,
-                    bit_file,
                     read_length,
                 ),
             )
+        else:
+            raise ValueError(f'source can be one of uart or fpga. Got {source}')
+
         p_buffer_to_frame = multiprocessing.Process(
             target=self._buffer_to_frame,
             args=(