aka "Luis Eduardo Ledoux Pardo". PhD student in Universitat Politècnica de Catalunya and Barcelona Supercomputing Center. Working on arithmetic digital design
-
Barcelona Supercomputing Center
- Spain / France
Block or Report
Block or report Bynaryman
Report abuse
Contact GitHub support about this user’s behavior. Learn more about reporting abuse.
Report abusePinned Loading
-
-
fpga_template
fpga_template PublicThis repository aims to automatically generates source files for HDL
Python
-
-
-
posit_overlay
posit_overlay PublicThis repository aims to try and experiment witth posit data representation
HTML
-
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.