USM support can be enabled with CMake option (disabled by default)

CHIP-SPV · May 14, 2023 · fad7d13 · fad7d13
1 parent 25d2f83
commit fad7d13
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Showing 3 changed files with 7 additions and 1 deletion.
diff --git a/CHIPSPVConfig.hh.in b/CHIPSPVConfig.hh.in
@@ -47,4 +47,6 @@
 
 #cmakedefine CHIP_DEFAULT_WARP_SIZE @DEFAULT_WARP_SIZE@
 
+#cmakedefine INTEL_USM_SUPPORT
+
 #endif
diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -190,7 +190,7 @@ option(USE_EXTERNAL_HIP_TESTS "Use Catch2 tests from the hip-tests submodule" OF
 option(USE_OCML_ROUNDED_OPS "Use OCML implementations for devicelib functions with explicit rounding mode such as __dadd_rd. Otherwise, rounding mode will be ignored" OFF)
 option(CHIP_ENABLE_NON_COMPLIANT_DEVICELIB_CODE "Enable non-compliant devicelib code such as calling LLVM builtins from inside kernel code. Enables certain unsigned long devicelib func variants" OFF)
 option(CHIP_FAST_MATH "Use native_ OpenCL functions which are fast but their precision is implementation defined" OFF)
-
+option(INTEL_USM_SUPPORT "enable support for cl_intel_unified_shared_memory in the OpenCL backend" OFF)
 # Warpsize would optimally be a device-specific, queried and made
 # effective at runtime. However, we need to fix the warpsize since SPIR-Vs need
 # to be portable across multiple devices. It should be more portable to

diff --git a/src/backend/OpenCL/CHIPBackendOpenCL.cc b/src/backend/OpenCL/CHIPBackendOpenCL.cc
@@ -903,8 +903,12 @@ CHIPContextOpenCL::CHIPContextOpenCL(cl::Context CtxIn, cl::Device Dev,
  }
 #endif
 
+#ifdef INTEL_USM_SUPPORT
  SupportsIntelUSM =
  DevExts.find("cl_intel_unified_shared_memory") != std::string::npos;
+#else
+ SupportsIntelUSM = false;
+#endif
  if (SupportsIntelUSM) {
  logDebug("Device supports Intel USM");
  Exts.USM.clSharedMemAllocINTEL =