chipStar 1.0 RC2
Pre-release
Pre-release
chipStar Release 1.0-RC2
chipStar can compile HIP and CUDA applications to platforms which support SPIR-V as the device intermediate representation. It supports OpenCL and Level Zero as the low-level runtime alternatives. More info here,
The full sources for the release (including git submodules) are available packaged in the attached file chipStar_1_0_RC2.tar.gz
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Release Highlights
- The compilation toolchain works with Clang/LLVM 15 and 16.
- Over 950 unit tests pass, several real-world applications have been tested to work
- See the Features document for the current HIP/CUDA feature coverage.
- Tested with Intel Level Zero on multiple GPU devices.
- Tested with Intel OpenCL for CPUs and GPUs.
- Tested with PoCL on Intel CPUs
- Large number of bugs fixed since 0.9
Known Issues
The 1.0 release is focused on correctness. There are known bottlenecks that can limit the performance by up to 10x in some cases. Many of these performance bottlenecks will be addressed in the next release. Please keep this in mind while testing chipStar 1.0, and report any correctness/stability issues by opening an issue on github.