[CHERI-RISC-V] Allow load/store mnemonics without the c prefix #749
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We were not checking capability mode loads/stores, only compressed ones and atomics.
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| multiclass CLR_r_aq_rl<bits<3> funct3, string opcodestr, | ||
| string Namespace = "CapModeOnly_"> { |
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Passing the DecoderNamespace is a bit ugly, but I couldn't figure out how to work around InstAlias not having such a field.
arichardson
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CI is failing because one of the RISC-V tests now gets a different error message - will fix this if the approach is considered ok. |
Instead, make it depend on the type of the operand. This commit only touches the basic load/store instruction without the assembler aliases or compressed instructions.
As a follow-up to the last commit this includes the aliases without an immediate offset.
This adds the atomic operations
This adds support for compressed instructions. Does not yet include Zcb or floating-point loads/stores.
This adds the floating point loads and stores and should conclude this series of patches.
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| @@ -22,7 +22,7 @@ la x1, %hi(foo) # CHECK: :[[@LINE]]:8: error: operand must be a bare symbol name | |||
| la x1, %lo(foo) # CHECK: :[[@LINE]]:8: error: operand must be a bare symbol name | |||
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| sw a2, %hi(a_symbol), a3 # CHECK: :[[@LINE]]:8: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the range [-2048, 2047] | |||
| sw a2, %lo(a_symbol), a3 # CHECK: :[[@LINE]]:23: error: invalid operand for instruction | |||
| sw a2, %lo(a_symbol), a3 # CHECK: :[[@LINE]]:23: error: operand must be a bare symbol name | |||
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Hm, this is a bit weird, though so is upstream's diagnostics?
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Yeah I don't quite understand why patch 1 changes the resulting error, but since neither of them are particularly helpful I don't think it matters.
I agree this is rather gross and could be fragile but duplicating all the lines seems even more ugly. I did the duplication approach for tests with only a handful of checks but for the larger ones the |
Instead, make it depend on the type of the operand. This does not yet include all instructions, but the initial set of loads/atomics has been converted (the ones that should be part of the standard version of CHERI-RISC-V).