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A Tool for Parallel Processing of ROS2 Hardware Acceleration on Zynq

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meta-FOrEST

meta-FOrEST is an automatic generation tool for ROS 2 nodes integrating multiple FPGA logic into a ROS 2 system (ROS2-FPGA nodes). FPGA and ROS 2 can be used to accelerate calculation processing and improve design productivity. meta-FOrEST (also FOrEST) supports the PYNQ platform installed on a Zynq SoC. With ROS 2 nodes running on a Zynq SoC, network communication with other machines is possible, facilitating load balancing and parallel processing with FPGA. meta-FOrEST users need only High-Level Synthesis. meta-FOrEST automatically integrates the IP cores into the ROS 2 system. meta-FOrEST users can run ROS2-FPGA nodes without having to write any programs.
Currently, meta-FOrEST has the following features:

  • Multiple ROS2-FPGA Nodes Generation
  • Automatic Generation of a Vivado Block Design with multiple IP cores

Supported Environment

FPGA SoC Boards

These are tested platforms and may work on other Zynq SoC boards.

Operating System on FPGA SoC Board
ROS 2
Vivado/Vitis HLS
  • 2022.1

Installation

git clone https://github.com/DYGV/meta-forest
cd meta-forest
pip3 install --upgrade pip
pip3 install .

Usage

Tutorials

You can learn how to use meta-FOrEST through examples.

Caution

  • The types available for meta-FOrEST are the same as for FOrEST's type support
  • HLS data I/O must be implemented with AXI4 (M_AXI), AXI4-Lite or AXI4-Stream
  • Ensure that the status register is allocated with s_axilite as follows
    #pragma HLS INTERFACE s_axilite port = return

Related Publications

  • [1] D. Pinheiro Leal, M. Sugaya, H. Amano, T. Ohkawa "Automated Integration of High-Level Synthesis FPGA Modules with ROS2 Systems", International Conference on Field Programmable Technology (FPT), 2020.

  • [2] D. Pinheiro Leal, M. Sugaya, H. Amano, T. Ohkawa "FPGA Acceleration of ROS2-Based Reinforcement Learning Agents", CANDAR'20 - 8th International Workshop on Computer Systems and Architectures (CSA'20), 2020.

  • [3] 岡崎英佑 (東海大), 菅谷みどり (芝浦工大), 大川猛 (東海大), “MEC向けROS2-FPGAノードの並列処理性能評価”, 情報処理学会 第85回全国大会 7K-03, 2023年3月.