Merge branch 'upstream-master'

src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp

@@ -777,13 +777,11 @@ void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
         }
         case vmIntrinsics::_floatToFloat16: {
           LIR_Opr tmp = new_register(T_FLOAT);
-          __ move(LIR_OprFact::floatConst(-0.0), tmp);
           __ f2hf(src, dst, tmp);
           break;
         }
         case vmIntrinsics::_float16ToFloat: {
           LIR_Opr tmp = new_register(T_FLOAT);
-          __ move(LIR_OprFact::floatConst(-0.0), tmp);
           __ hf2f(src, dst, tmp);
           break;
         }

src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp

@@ -696,8 +696,6 @@ void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
       value.load_item();
       LIR_Opr dst = rlock_result(x);
       LIR_Opr tmp = new_register(T_FLOAT);
-      // f2hf treats tmp as live_in. Workaround: initialize to some value.
-      __ move(LIR_OprFact::floatConst(-0.0), tmp); // just to satisfy LinearScan
       __ f2hf(value.result(), dst, tmp);
       break;
     }

src/hotspot/cpu/riscv/vm_version_riscv.cpp

@@ -154,10 +154,6 @@ void VM_Version::common_initialize() {
       unaligned_access.value() != MISALIGNED_FAST);
   }
 
-  if (FLAG_IS_DEFAULT(AlignVector)) {
-    FLAG_SET_DEFAULT(AlignVector, AvoidUnalignedAccesses);
-  }
-
   // See JDK-8026049
   // This machine has fast unaligned memory accesses
   if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
@@ -448,6 +444,10 @@ void VM_Version::c2_initialize() {
     warning("AES/CTR intrinsics are not available on this CPU");
     FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
   }
+
+  if (FLAG_IS_DEFAULT(AlignVector)) {
+    FLAG_SET_DEFAULT(AlignVector, AvoidUnalignedAccesses);
+  }
 }
 
 #endif // COMPILER2

src/hotspot/cpu/s390/assembler_s390.hpp

@@ -122,14 +122,14 @@ class RelAddr {
     return is_in_range_of_RelAddr(target, pc, true);
   }
   static bool is_in_range_of_RelAddr16(ptrdiff_t distance) {
-    return is_in_range_of_RelAddr((address)distance, 0, true);
+    return is_in_range_of_RelAddr((address)distance, nullptr, true);
   }
 
   static bool is_in_range_of_RelAddr32(address target, address pc) {
     return is_in_range_of_RelAddr(target, pc, false);
   }
   static bool is_in_range_of_RelAddr32(ptrdiff_t distance) {
-    return is_in_range_of_RelAddr((address)distance, 0, false);
+    return is_in_range_of_RelAddr((address)distance, nullptr, false);
   }
 
   static int pcrel_off(address target, address pc, bool shortForm) {
@@ -149,14 +149,14 @@ class RelAddr {
     return pcrel_off(target, pc, true);
   }
   static int pcrel_off16(ptrdiff_t distance) {
-    return pcrel_off((address)distance, 0, true);
+    return pcrel_off((address)distance, nullptr, true);
   }
 
   static int pcrel_off32(address target, address pc) {
     return pcrel_off(target, pc, false);
   }
   static int pcrel_off32(ptrdiff_t distance) {
-    return pcrel_off((address)distance, 0, false);
+    return pcrel_off((address)distance, nullptr, false);
   }
 
   static ptrdiff_t inv_pcrel_off16(int offset) {

src/hotspot/cpu/s390/frame_s390.cpp

@@ -265,7 +265,7 @@ void frame::patch_pc(Thread* thread, address pc) {
                   p2i(&((address*) _sp)[-1]), p2i(((address*) _sp)[-1]), p2i(pc));
   }
   assert(!Continuation::is_return_barrier_entry(*pc_addr), "return barrier");
-  assert(_pc == *pc_addr || pc == *pc_addr || 0 == *pc_addr,
+  assert(_pc == *pc_addr || pc == *pc_addr || nullptr == *pc_addr,
          "must be (pc: " INTPTR_FORMAT " _pc: " INTPTR_FORMAT " pc_addr: " INTPTR_FORMAT
          " *pc_addr: " INTPTR_FORMAT  " sp: " INTPTR_FORMAT ")",
          p2i(pc), p2i(_pc), p2i(pc_addr), p2i(*pc_addr), p2i(sp()));
@@ -296,10 +296,10 @@ void frame::patch_pc(Thread* thread, address pc) {
 bool frame::is_interpreted_frame_valid(JavaThread* thread) const {
   assert(is_interpreted_frame(), "Not an interpreted frame");
   // These are reasonable sanity checks
-  if (fp() == 0 || (intptr_t(fp()) & (wordSize-1)) != 0) {
+  if (fp() == nullptr || (intptr_t(fp()) & (wordSize-1)) != 0) {
     return false;
   }
-  if (sp() == 0 || (intptr_t(sp()) & (wordSize-1)) != 0) {
+  if (sp() == nullptr || (intptr_t(sp()) & (wordSize-1)) != 0) {
     return false;
   }
   int min_frame_slots = (z_common_abi_size + z_ijava_state_size) / sizeof(intptr_t);
@@ -420,7 +420,7 @@ void frame::back_trace(outputStream* st, intptr_t* start_sp, intptr_t* top_pc, u
                            ? (address) top_pc
                            : (address) *((intptr_t*)(((address) current_sp) + _z_abi(return_pc)));
 
-    if ((intptr_t*) current_fp != 0 && (intptr_t*) current_fp <= current_sp) {
+    if ((intptr_t*) current_fp != nullptr && (intptr_t*) current_fp <= current_sp) {
       st->print_cr("ERROR: corrupt stack");
       return;
     }
@@ -503,7 +503,7 @@ void frame::back_trace(outputStream* st, intptr_t* start_sp, intptr_t* top_pc, u
       case 0: // C frame:
         {
           st->print("    ");
-          if (current_pc == 0) {
+          if (current_pc == nullptr) {
             st->print("? ");
           } else {
              // name

src/hotspot/cpu/s390/macroAssembler_s390.cpp

@@ -4108,7 +4108,7 @@ void MacroAssembler::encode_klass_not_null(Register dst, Register src) {
   Register current = (src != noreg) ? src : dst; // Klass is in dst if no src provided. (dst == src) also possible.
   address  base    = CompressedKlassPointers::base();
   int      shift   = CompressedKlassPointers::shift();
-  bool     need_zero_extend = base != 0;
+  bool     need_zero_extend = base != nullptr;
   assert(UseCompressedClassPointers, "only for compressed klass ptrs");
 
   BLOCK_COMMENT("cKlass encoder {");

src/hotspot/cpu/s390/nativeInst_s390.cpp

@@ -59,7 +59,7 @@ void NativeInstruction::verify() {
   //  - any address in first page (0x0000 .. 0x0fff)
   //  - odd address (will cause a "specification exception")
   address addr = addr_at(0);
-  if ((addr == 0) || (((unsigned long)addr & ~0x0fff) == 0) || ((intptr_t)addr & 1) != 0) {
+  if ((addr == nullptr) || (((unsigned long)addr & ~0x0fff) == 0) || ((intptr_t)addr & 1) != 0) {
     tty->print_cr(INTPTR_FORMAT ": bad instruction address", p2i(addr));
     fatal("not an instruction address");
   }

src/hotspot/cpu/s390/relocInfo_s390.cpp

@@ -164,7 +164,6 @@ void Relocation::pd_set_call_destination(address x) {
 
 address* Relocation::pd_address_in_code() {
  ShouldNotReachHere();
- return 0;
 }
 
 address Relocation::pd_get_address_from_code() {

src/hotspot/cpu/s390/stubGenerator_s390.cpp

@@ -688,7 +688,7 @@ class StubGenerator: public StubCodeGenerator {
     // code (code_size == 0) confuses opjitconv
     // StubCodeMark mark(this, "StubRoutines", "verify_oop_stub");
 
-    address start = 0;
+    address start = nullptr;
 
 #if !defined(PRODUCT)
     start = CAST_FROM_FN_PTR(address, verify_oop_helper);

src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp

@@ -349,11 +349,9 @@ void LIRGenerator::do_NegateOp(NegateOp* x) {
   if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
     if (x->type()->tag() == doubleTag) {
       tmp = new_register(T_DOUBLE);
-      __ move(LIR_OprFact::doubleConst(-0.0), tmp);
     }
     else if (x->type()->tag() == floatTag) {
       tmp = new_register(T_FLOAT);
-      __ move(LIR_OprFact::floatConst(-0.0), tmp);
     }
   }
 #endif
@@ -834,12 +832,10 @@ void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
   if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) &&
       (x->id() == vmIntrinsics::_dabs)) {
     tmp = new_register(T_DOUBLE);
-    __ move(LIR_OprFact::doubleConst(-0.0), tmp);
   }
 #endif
   if (x->id() == vmIntrinsics::_floatToFloat16) {
     tmp = new_register(T_FLOAT);
-    __ move(LIR_OprFact::floatConst(-0.0), tmp);
   }
 
   switch(x->id()) {

src/hotspot/cpu/x86/c1_LinearScan_x86.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2005, 2023, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2005, 2024, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -635,6 +635,24 @@ void FpuStackAllocator::handle_op1(LIR_Op1* op1) {
       break;
     }
 
+    case lir_abs:
+    case lir_sqrt:
+    case lir_neg: {
+      assert(in->is_fpu_register(), "must be");
+      assert(res->is_fpu_register(), "must be");
+      assert(in->is_last_use(), "old value gets destroyed");
+
+      insert_free_if_dead(res, in);
+      insert_exchange(in);
+      do_rename(in, res);
+
+      new_in = to_fpu_stack_top(res);
+      new_res = new_in;
+
+      op1->set_fpu_stack_size(sim()->stack_size());
+      break;
+    }
+
     default: {
       assert(!in->is_float_kind() && !res->is_float_kind(), "missed a fpu-operation");
     }
@@ -756,26 +774,6 @@ void FpuStackAllocator::handle_op2(LIR_Op2* op2) {
       break;
     }
 
-    case lir_abs:
-    case lir_sqrt:
-    case lir_neg: {
-      // Right argument appears to be unused
-      assert(right->is_illegal(), "must be");
-      assert(left->is_fpu_register(), "must be");
-      assert(res->is_fpu_register(), "must be");
-      assert(left->is_last_use(), "old value gets destroyed");
-
-      insert_free_if_dead(res, left);
-      insert_exchange(left);
-      do_rename(left, res);
-
-      new_left = to_fpu_stack_top(res);
-      new_res = new_left;
-
-      op2->set_fpu_stack_size(sim()->stack_size());
-      break;
-    }
-
     default: {
       assert(false, "missed a fpu-operation");
     }

src/hotspot/cpu/x86/c1_LinearScan_x86.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2005, 2024, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -66,35 +66,7 @@ inline bool LinearScan::is_caller_save(int assigned_reg) {
 
 
 inline void LinearScan::pd_add_temps(LIR_Op* op) {
-  switch (op->code()) {
-    case lir_tan: {
-      // The slow path for these functions may need to save and
-      // restore all live registers but we don't want to save and
-      // restore everything all the time, so mark the xmms as being
-      // killed.  If the slow path were explicit or we could propagate
-      // live register masks down to the assembly we could do better
-      // but we don't have any easy way to do that right now.  We
-      // could also consider not killing all xmm registers if we
-      // assume that slow paths are uncommon but it's not clear that
-      // would be a good idea.
-      if (UseSSE > 0) {
-#ifdef ASSERT
-        if (TraceLinearScanLevel >= 2) {
-          tty->print_cr("killing XMMs for trig");
-        }
-#endif
-        int num_caller_save_xmm_regs = FrameMap::get_num_caller_save_xmms();
-        int op_id = op->id();
-        for (int xmm = 0; xmm < num_caller_save_xmm_regs; xmm++) {
-          LIR_Opr opr = FrameMap::caller_save_xmm_reg_at(xmm);
-          add_temp(reg_num(opr), op_id, noUse, T_ILLEGAL);
-        }
-      }
-      break;
-    }
-    default:
-      break;
-  }
+  // No special case behaviours yet
 }
 
 

src/hotspot/share/c1/c1_LIR.cpp

@@ -452,12 +452,18 @@ void LIR_OpVisitState::visit(LIR_Op* op) {
     case lir_monaddr:        // input and result always valid, info always invalid
     case lir_null_check:     // input and info always valid, result always invalid
     case lir_move:           // input and result always valid, may have info
+    case lir_sqrt:           // FP Ops have no info, but input and result
+    case lir_abs:
+    case lir_neg:
+    case lir_f2hf:
+    case lir_hf2f:
     {
       assert(op->as_Op1() != nullptr, "must be");
       LIR_Op1* op1 = (LIR_Op1*)op;
 
       if (op1->_info)                  do_info(op1->_info);
       if (op1->_opr->is_valid())       do_input(op1->_opr);
+      if (op1->_tmp->is_valid())       do_temp(op1->_tmp);
       if (op1->_result->is_valid())    do_output(op1->_result);
 
       break;
@@ -483,6 +489,7 @@ void LIR_OpVisitState::visit(LIR_Op* op) {
 
       assert(op1->_info != nullptr, "");  do_info(op1->_info);
       if (op1->_opr->is_valid())       do_temp(op1->_opr); // safepoints on SPARC need temporary register
+      assert(op1->_tmp->is_illegal(), "not used");
       assert(op1->_result->is_illegal(), "safepoint does not produce value");
 
       break;
@@ -566,11 +573,6 @@ void LIR_OpVisitState::visit(LIR_Op* op) {
     case lir_add:
     case lir_sub:
     case lir_rem:
-    case lir_sqrt:
-    case lir_abs:
-    case lir_neg:
-    case lir_f2hf:
-    case lir_hf2f:
     case lir_logic_and:
     case lir_logic_or:
     case lir_logic_xor:
@@ -667,6 +669,7 @@ void LIR_OpVisitState::visit(LIR_Op* op) {
 
       assert(op1->_info == nullptr, "no info");
       assert(op1->_opr->is_valid(), "exception oop");         do_input(op1->_opr);
+      assert(op1->_tmp->is_illegal(), "not used");
       assert(op1->_result->is_illegal(), "no result");
 
       break;
@@ -1730,6 +1733,11 @@ const char * LIR_Op::name() const {
      case lir_cond_float_branch:     s = "flt_cond_br";   break;
      case lir_move:                  s = "move";          break;
      case lir_roundfp:               s = "roundfp";       break;
+     case lir_abs:                   s = "abs";           break;
+     case lir_neg:                   s = "neg";           break;
+     case lir_sqrt:                  s = "sqrt";          break;
+     case lir_f2hf:                  s = "f2hf";          break;
+     case lir_hf2f:                  s = "hf2f";          break;
      case lir_rtcall:                s = "rtcall";        break;
      case lir_throw:                 s = "throw";         break;
      case lir_unwind:                s = "unwind";        break;
@@ -1746,11 +1754,6 @@ const char * LIR_Op::name() const {
      case lir_mul:                   s = "mul";           break;
      case lir_div:                   s = "div";           break;
      case lir_rem:                   s = "rem";           break;
-     case lir_abs:                   s = "abs";           break;
-     case lir_neg:                   s = "neg";           break;
-     case lir_sqrt:                  s = "sqrt";          break;
-     case lir_f2hf:                  s = "f2hf";          break;
-     case lir_hf2f:                  s = "hf2f";          break;
      case lir_logic_and:             s = "logic_and";     break;
      case lir_logic_or:              s = "logic_or";      break;
      case lir_logic_xor:             s = "logic_xor";     break;