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Merge branch 'main' of https://github.com/FPGAwars/iceMux
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Obijuan committed Jul 7, 2024
2 parents a047ca7 + a3c2ea6 commit be38946
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3 changes: 3 additions & 0 deletions README.md
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Expand Up @@ -208,6 +208,9 @@ For installing and using this colection in Icestudio follow these steps:
* mux-2-1
* **Mux-4-1**
* mux-4-1
* **17-bits**
* **Mux-2-1**
* mux-2-1
* **18-bits**
* **Mux-2-1**
* Mux-2-1
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4 changes: 4 additions & 0 deletions locale/translation.js
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Expand Up @@ -106,6 +106,7 @@ gettext('13-bits');
gettext('14-bits');
gettext('15-bits');
gettext('16-bits');
gettext('17-bits');
gettext('18-bits');
gettext('19-bits');
gettext('20-bits');
Expand Down Expand Up @@ -319,6 +320,9 @@ gettext('Bus16-Join-half: Join the two same halves into an 16-bits Bus');
gettext('mux-4-1');
gettext('16-to-1 Multplexer (16-bit channels). Verilog implementation');
gettext('Mux-2-1');
gettext('mux-2-1');
gettext('2-to-1 Multplexer (17-bit channels). Verilog implementation');
gettext('Mux-2-1');
gettext('Mux-2-1');
gettext('2-to-1 Multplexer (18-bit channels). Verilog implementation');
gettext('Mux-2-1');
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