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ARMv8.1-M: Add PACBTI examples #17

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AhmedIsmail02
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@AhmedIsmail02 AhmedIsmail02 commented Oct 7, 2024

Description

This PR adds two examples (MPU and non-MPU variants) that demonstrate how the new Pointer Authentication and Branch Target Identification (PACBTI) along with the new MPU region attribute Privileged eXecute Never (PXN) security features can be used on Cortex-M85 processor.

The examples are based on Corstone-315 Ecosystem Fixed Virtual Platform (Arm Cortex-M85 CPU and Ethos-U65 NPU).

The examples are compatible with Arm Compiler For Embedded v.621 and IAR toolchain for Arm v9.60.2. The support for GNU toolchain is not yet enabled due to known issues.

Depends on FreeRTOS-Kernel PR!1147
Depends on FreeRTOS-Kernel PR!1164

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This example is going to be replaced by a new
example where MPU PXN feature along with PACBTI
security feature would be demonstrated.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
kstribrnAmzn
kstribrnAmzn previously approved these changes Oct 7, 2024
@kstribrnAmzn
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Would you like me to squash and merge or preserve the commits?

@urutva
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urutva commented Oct 8, 2024

Thanks for the review @kstribrnAmzn. Preserve the commits please.
This example depends on FreeRTOS/FreeRTOS-Kernel#1147 kernel changes. I think it's better to wait for the kernel changes to be merged first and then merge this PR. Thanks

Arm-Corstone-Platform-Bsp library is a Board support
package (BSP) library for Corstone-3xx family of target
platforms where it's implemented using the CMSIS-Driver
software API.

The Partner-Supported-Demos would benefit from this library
as it shall be consumed by examples demonstrated on Corstone-3xx
target platforms (ex. MPU PXN, and PACBTI example (to be added)).

This improvement prevents duplicating the contents of CMSIS
subdirectory for each example demonstrated on Corstone-3xx
target platforms.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
Ahmed Ismail and others added 2 commits October 24, 2024 14:53
This example demonstrates how the new
Pointer Authentication and Branch Target Identification
(PACBTI) along with the new MPU region attribute
Privileged eXecute Never (PXN) security features
can be used on Cortex-M85 processor.

The example is based on Corstone-315 Ecosystem Fixed
Virtual Platform (Arm Cortex-M85 CPU and Ethos-U55 NPU).

The example consists of three main tasks
(prvPacTask , prvBtiTask, and prvPxnTask).
The prvPacTask , and prvBtiTask tasks job is to trigger
the UsageFault exception by mimicking ROP
(Return Oriented Programming), JOP (Jump Oriented Programming)
security exploit attacks. Whereas, the privileged prvPxnTask
job is to trigger the MemoryFault exception by executing an
instruction from an MPU region with Privileged eXecute Never
(PXN) attribute set.

The example is compatible with Arm Compiler For
Embedded toolchain and IAR toolchain for Arm.
The support for GNU toolchain is not yet enabled
due to known issues.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
This example demonstrates how the new
Pointer Authentication and Branch Target Identification
(PACBTI)security feature can be used on Cortex-M85 processor.

The example is based on Corstone-315 Ecosystem Fixed
Virtual Platform (Arm Cortex-M85 CPU and Ethos-U65 NPU).

The example consists of two main tasks
(prvPacTask , and prvBtiTask).
The prvPacTask , and prvBtiTask tasks job is to trigger
the UsageFault exception by mimicking ROP
(Return Oriented Programming), JOP (Jump Oriented Programming)
security exploit attacks.

The example is compatible with Arm Compiler For
Embedded toolchain and IAR toolchain for Arm.
The support for GNU toolchain is not yet enabled
due to known issues.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
@urutva
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urutva commented Oct 29, 2024

@kstribrnAmzn FreeRTOS-Kernel MRs are merged. Can we get this example merged as well, please? Thanks

@kstribrnAmzn kstribrnAmzn merged commit 033158c into FreeRTOS:main Oct 30, 2024
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3 participants