ci: Fix formatting issues

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_Common.h

@@ -33,7 +33,7 @@
  *    Initial release
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Driver/Include/Driver_Common.h
 */
 
@@ -55,17 +55,17 @@ typedef struct _ARM_DRIVER_VERSION {
 } ARM_DRIVER_VERSION;
 
 /* General return codes */
-#define ARM_DRIVER_OK                 0 ///< Operation succeeded 
+#define ARM_DRIVER_OK                 0 ///< Operation succeeded
 #define ARM_DRIVER_ERROR             -1 ///< Unspecified error
 #define ARM_DRIVER_ERROR_BUSY        -2 ///< Driver is busy
 #define ARM_DRIVER_ERROR_TIMEOUT     -3 ///< Timeout occurred
 #define ARM_DRIVER_ERROR_UNSUPPORTED -4 ///< Operation not supported
 #define ARM_DRIVER_ERROR_PARAMETER   -5 ///< Parameter error
-#define ARM_DRIVER_ERROR_SPECIFIC    -6 ///< Start of driver specific errors 
+#define ARM_DRIVER_ERROR_SPECIFIC    -6 ///< Start of driver specific errors
 
 /**
 \brief General power states
-*/ 
+*/
 typedef enum _ARM_POWER_STATE {
   ARM_POWER_OFF,                        ///< Power off: no operation possible
   ARM_POWER_LOW,                        ///< Low Power mode: retain state, detect and signal wake-up events

source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH.h

@@ -37,7 +37,7 @@
  *    Initial release
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Driver/Include/Driver_ETH.h
 */
 

source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH_MAC.h

@@ -53,7 +53,7 @@
  *    Initial release
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Driver/Include/Driver_ETH_MAC.h
 */
 
@@ -202,7 +202,7 @@ typedef struct _ARM_ETH_MAC_TIME {
   \param[in]   len    Frame buffer length in bytes
   \return      number of data bytes read or execution status
                  - value >= 0: number of data bytes read
-                 - value < 0: error occurred, value is execution status as defined with \ref execution_status 
+                 - value < 0: error occurred, value is execution status as defined with \ref execution_status
 */
 /**
   \fn          uint32_t ARM_ETH_MAC_GetRxFrameSize (void)

source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH_PHY.h

@@ -38,7 +38,7 @@
  *    Initial release
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Driver/Include/Driver_ETH_PHY.h
 */
 

source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/ETH_LAN91C111.c

@@ -575,7 +575,7 @@ static int32_t MAC_SendFrame (const uint8_t *frame, uint32_t len, uint32_t flags
   \param[in]   len    Frame buffer length in bytes
   \return      number of data bytes read or execution status
                  - value >= 0: number of data bytes read
-                 - value < 0: error occurred, value is execution status as defined with \ref execution_status 
+                 - value < 0: error occurred, value is execution status as defined with \ref execution_status
 */
 static int32_t MAC_ReadFrame (uint8_t *frame, uint32_t len) {
   uint32_t stat,sz,data;

source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/ETH_LAN91C111.h

@@ -25,7 +25,7 @@
  * Project:      Register Interface Definitions for LAN91C111
  * -------------------------------------------------------------------- */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://github.com/ARM-software/CMSIS-Driver/blob/b91908d907b647bd212920e30b383b03809d68e0/ETH/ETH_LAN91C111.h
 */
 
@@ -217,7 +217,7 @@
 #define MSK_TX_EMPTY    0x04        // Tx FIFO empty int. mask
 #define MSK_TX_INT      0x02        // Tx Complete int. mask
 #define MSK_RCV         0x01        // Rx Complete int. mask
-    
+
 /* PHY Management Interface */
 #define MGMT_MSK_CRS100 0x0040      // Disables CRS100 detection in Tx Half Dup.
 #define MGMT_MDOE       0x0008      // MII - 1= MDO pin output, 0= MDO tristated

source/portable/NetworkInterface/MPS3_AN552/Device/Include/SSE300MPS3.h

@@ -16,7 +16,7 @@
  * limitations under the License.
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://gitlab.arm.com/iot/open-iot-sdk/arm-corstone-platform-bsp/-/blob/main/corstone300/Device/Include/SSE300MPS3.h
 */
 

source/portable/NetworkInterface/MPS3_AN552/Device/Include/cachel1_armv7.h

@@ -24,7 +24,7 @@
  * limitations under the License.
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/cachel1_armv7.h
 */
 

source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_armclang.h

@@ -26,7 +26,7 @@
 
 /*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/cmsis_armclang.h
 */
 

source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_compiler.h

@@ -24,7 +24,7 @@
  * limitations under the License.
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/cmsis_compiler.h
 */
 

source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_gcc.h

@@ -24,7 +24,7 @@
  * limitations under the License.
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/cmsis_gcc.h
 */
 

source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_version.h

@@ -24,7 +24,7 @@
  * limitations under the License.
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/cmsis_version.h
 */
 

source/portable/NetworkInterface/MPS3_AN552/Device/Include/core_cm55.h

@@ -24,7 +24,7 @@
  * limitations under the License.
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/core_cm55.h
 */
 

source/portable/NetworkInterface/MPS3_AN552/Device/Include/mpu_armv8.h

@@ -24,7 +24,7 @@
  * limitations under the License.
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/mpu_armv8.h
 */
 
@@ -170,7 +170,7 @@
   (MPU_RLAR_EN_Msk))
 
 #if defined(MPU_RLAR_PXN_Pos)
-  
+
 /** \brief Region Limit Address Register with PXN value
 * \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
 * \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
@@ -181,7 +181,7 @@
   (((PXN) << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
   (((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
   (MPU_RLAR_EN_Msk))
-  
+
 #endif
 
 /**
@@ -200,7 +200,7 @@ __STATIC_INLINE uint32_t ARM_MPU_TYPE()
 {
   return ((MPU->TYPE) >> 8);
 }
-    
+
 /** Enable the MPU.
 * \param MPU_Control Default access permissions for unconfigured regions.
 */
@@ -267,11 +267,11 @@ __STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t at
   const uint8_t reg = idx / 4U;
   const uint32_t pos = ((idx % 4U) * 8U);
   const uint32_t mask = 0xFFU << pos;
-  
+
   if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
     return; // invalid index
   }
-  
+
   mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
 }
 
@@ -318,7 +318,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
 * \param rnr Region number to be cleared.
 */
 __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
-{  
+{
   ARM_MPU_ClrRegionEx(MPU_NS, rnr);
 }
 #endif
@@ -328,7 +328,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
 * \param rnr Region number to be configured.
 * \param rbar Value for RBAR register.
 * \param rlar Value for RLAR register.
-*/   
+*/
 __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
 {
   mpu->RNR = rnr;
@@ -340,7 +340,7 @@ __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t r
 * \param rnr Region number to be configured.
 * \param rbar Value for RBAR register.
 * \param rlar Value for RLAR register.
-*/   
+*/
 __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
 {
   ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
@@ -351,10 +351,10 @@ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rla
 * \param rnr Region number to be configured.
 * \param rbar Value for RBAR register.
 * \param rlar Value for RLAR register.
-*/   
+*/
 __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
 {
-  ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);  
+  ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
 }
 #endif
 
@@ -366,7 +366,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t
 __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
 {
   uint32_t i;
-  for (i = 0U; i < len; ++i) 
+  for (i = 0U; i < len; ++i)
   {
     dst[i] = src[i];
   }
@@ -378,7 +378,7 @@ __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_
 * \param table Pointer to the MPU configuration table.
 * \param cnt Amount of regions to be configured.
 */
-__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
 {
   const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
   if (cnt == 1U) {
@@ -387,7 +387,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
   } else {
     uint32_t rnrBase   = rnr & ~(MPU_TYPE_RALIASES-1U);
     uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
-    
+
     mpu->RNR = rnrBase;
     while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
       uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
@@ -398,7 +398,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
       rnrBase += MPU_TYPE_RALIASES;
       mpu->RNR = rnrBase;
     }
-    
+
     ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
   }
 }
@@ -408,7 +408,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
 * \param table Pointer to the MPU configuration table.
 * \param cnt Amount of regions to be configured.
 */
-__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
 {
   ARM_MPU_LoadEx(MPU, rnr, table, cnt);
 }
@@ -419,7 +419,7 @@ __STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, u
 * \param table Pointer to the MPU configuration table.
 * \param cnt Amount of regions to be configured.
 */
-__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
 {
   ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
 }

source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_base_address.h

@@ -22,7 +22,7 @@
  *        Ethos-U55 platform.
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://gitlab.arm.com/iot/open-iot-sdk/arm-corstone-platform-bsp/-/blob/ce35a01596530637b16287234788d68b0d1c75a8/corstone300/Board/Platform/platform_base_address.h
 */
 

source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_irq.h

@@ -16,7 +16,7 @@
  * limitations under the License.
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://gitlab.arm.com/iot/open-iot-sdk/arm-corstone-platform-bsp/-/blob/ce35a01596530637b16287234788d68b0d1c75a8/corstone300/Board/Platform/platform_irq.h
 */
 

source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_pins.h

@@ -21,7 +21,7 @@
  * \brief This file defines all the pins for this platform.
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://gitlab.arm.com/iot/open-iot-sdk/arm-corstone-platform-bsp/-/blob/ce35a01596530637b16287234788d68b0d1c75a8/corstone300/Board/Platform/platform_pins.h
 */
 

source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_regs.h

@@ -16,7 +16,7 @@
  * limitations under the License.
  */
 
-/* This file is a copy of 
+/* This file is a copy of
  * https://gitlab.arm.com/iot/open-iot-sdk/arm-corstone-platform-bsp/-/blob/ce35a01596530637b16287234788d68b0d1c75a8/corstone300/Board/Platform/platform_regs.h
 */