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IHP SG13G2 Open PDK technology files #302

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merged 34 commits into from
Jan 8, 2025

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mole99
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@mole99 mole99 commented Dec 18, 2024

This is the alpha pre-release of the IHP SG13G2 Open PDK technology files developed by Efabless Corporation for use with the Magic VLSI layout tool and netgen LVS tool.

  • Release notes can be found under libs.tech/magic/RELEASE_NOTES.md.
  • The usage guide for magic can be found under libs.tech/magic/README.md.

Please note that this is a pre-release which may still have some issues. We welcome any feedback on the current version. Please open issues under the upstream IHP-GmbH/IHP-Open-PDK repository.

Release notes for this alpha pre-release:

version 0.1.2 (alpha pre-release)
December 17, 2024
Efabless Corporation

Included in this pre-release:

  1. Technology file for magic (ihp-sg13g2.tech)
    • Layer definitions and styles
    • Connectivity definitions
    • Interactive wiring definitions
    • DRC rules
    • Device extraction
    • Parasitic extraction
    • GDS read/write
    • LEF/DEF read/write
    • Antenna rules
  2. Technology file for magic with GDS-mapped layers (ihp-sg13g2-GDS.tech)
  3. Startup script for magic (ihp-sg13g2-GDS.magicrc)
  4. LVS setup for netgen (../netgen/ihp-sg13g2_setup.tcl)

Not included/completed in this pre-release:

  1. Device generator for magic (ihp-sg13g2.tcl).
    The file in the pre-release version is a placeholder only.
  2. Density rule check (check_density.py)
    Needs verification.
  3. Fill generation (generate_fill.py)
    Work in progress.
  4. Seal ring generator (may be implemented in the device generation script)

All items not included in this pre-release are expected to be completed by April 2025.

@KrzysztofHerman
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@mole99 @RTimothyEdwards thank you for this contribution.
Seems that we will have Magic Christmas :)

RTimothyEdwards and others added 27 commits December 18, 2024 16:34
and netgen support for the IHP sg13g2 open PDK.  This mainly
includes layer mappings, contacts, and connectivity information
for magic, a list of known device models (in comments), and basic
GDS input/output mapping.  This is enough to read, for example,
the standard cell library from GDS, but not much else.  Work will
be ongoing over the next nine months.

Signed-off-by: Leo Moser <leo.moser@efabless.com>
Signed-off-by: Leo Moser <leo.moser@efabless.com>
Signed-off-by: Leo Moser <leo.moser@efabless.com>
device extraction.

Signed-off-by: Leo Moser <leo.moser@efabless.com>
although this is still very much a work in progress.

Signed-off-by: Leo Moser <leo.moser@efabless.com>
DRC rules are now handled correctly.

Signed-off-by: Leo Moser <leo.moser@efabless.com>
of bipolar transistors and the schottky diode, and a lot of
additional DRC rule additions, corrections, and refinement.

Signed-off-by: Leo Moser <leo.moser@efabless.com>
incorrect implementation of the rule in magic.  The workaround,
using cifdrc rules, works but is very inefficient.

Signed-off-by: Leo Moser <leo.moser@efabless.com>
Signed-off-by: Leo Moser <leo.moser@efabless.com>
Signed-off-by: Leo Moser <leo.moser@efabless.com>
Signed-off-by: Leo Moser <leo.moser@efabless.com>
…tion

Signed-off-by: Leo Moser <leo.moser@efabless.com>
Signed-off-by: Leo Moser <leo.moser@efabless.com>
Signed-off-by: Leo Moser <leo.moser@efabless.com>
Signed-off-by: Leo Moser <leo.moser@efabless.com>
Signed-off-by: Leo Moser <leo.moser@efabless.com>
the original implementation, which has now been fixed in the magic
source code.  Updated the minimum version of magic to reflect that
only version 8.3.506 will correctly flag run-length spacing
violations.

Signed-off-by: Leo Moser <leo.moser@efabless.com>
seal ring, and a few additional obscure layers not previously
handled.  No longer generates missing layer warnings when reading
the primitive device library.

Signed-off-by: Leo Moser <leo.moser@efabless.com>
Signed-off-by: Leo Moser <leo.moser@efabless.com>
output generation of layers for scr1, nmoscl_2, nmoscl_4, and ptapSB,
mainly by introducing additional diffusion resistor types.

Signed-off-by: Leo Moser <leo.moser@efabless.com>
pnpMPA device extraction (no device models exists for SVaricap,
so unsure what to do with it).  DRC errors exist on SVaricap,
as it is complicated to handle the DRC exceptions, and may be
more easily dealt with using the device generators.

Signed-off-by: Leo Moser <leo.moser@efabless.com>
two files, one RELEASE_NOTES with a list of deliverables in the
upcoming pull request back to the upstream repository; and
README with notes about using the IHP open PDK with the magic
layout editor.

Signed-off-by: Leo Moser <leo.moser@efabless.com>
Signed-off-by: Leo Moser <leo.moser@efabless.com>
(1) Added extraction devices for metal resistors (ideal resistors)
(2) Added extraction device for SVaricap (placeholder, as there is no model)
(3) Added connectivity for isodiffres (shorting across the layer because no
    information exists on the sheet resistance)
(4) Removed isolated substrate layer from under tap contacts (because this
    is not meaningful in magic)

Signed-off-by: Leo Moser <leo.moser@efabless.com>
layout.  Found an error in magic that prevented one of the rules
from being implemented;  updated the minimum required version of
magic for the PDK accordingly.

Signed-off-by: Leo Moser <leo.moser@efabless.com>
scripts for density checks and fill pattern generation.  Corrected
most of the fill pattern generation sizes and spacings.  Commented
out the sourcing of the device generator script, which is not yet
ready for pre-release.

Signed-off-by: Leo Moser <leo.moser@efabless.com>
Signed-off-by: Leo Moser <leo.moser@efabless.com>
@mole99
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mole99 commented Dec 18, 2024

Thanks @KrzysztofHerman, that's for sure!
The commits are now properly signed off too :)

@RTimothyEdwards
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@KrzysztofHerman : Thank you! There are many loose ends to tie up in the upcoming two or three months along with the generated cell layout scripts, OpenLane2 support, and everything else that we have promised, but I now have a very good understanding of the process and look forward to helping with continual development and improvement.

@mole99
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mole99 commented Dec 18, 2024

@KrzysztofHerman I have one question: should we add ourselves to the Authors file and change the copyright to "IHP PDK Authors" where applicable?

@sergeiandreyev
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Hi @mole99, yes, please go ahead with these updates.

Signed-off-by: Leo Moser <leo.moser@efabless.com>
Signed-off-by: Leo Moser <leo.moser@efabless.com>
@mole99
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mole99 commented Dec 19, 2024

@sergeiandreyev Alright, all done!

the QA set, and especially to handle rules around butted contacts.

Signed-off-by: mole99 <leomoser99@gmail.com>
tech file.

Signed-off-by: mole99 <leomoser99@gmail.com>
Implemented pad rules (includes bond pad, copper pillar pad, and
solder bump pad).  Raised issue on github about incorrect layout
of the copper pillar pad in the primitive device library.  Note
that the passivation layer "sbump" and "cupillar" purposes are
not used in any layouts that I can find, nor specified in the
documentation other than a layer number assignment, so they are
not generated as output by magic.
Re-implemented the seal ring via layers and implemented the seal ring
layer DRC rules.
Added more DRC rules for latch-up and for devices in deep n-well
structures.  Updated magic with a new GDS operator option that
simplifies the generation of latch-up rules;  applied the new
rule option in the IHP tech file for magic (with a corresponding
update of the minimum required version of magic).
@mole99
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mole99 commented Jan 8, 2025

@sergeiandreyev @KrzysztofHerman Please feel free to merge this PR.
The changes here are in good shape and ready for user feedback.

We'll open another PR for the next batch of deliverables. Thanks!

@sergeiandreyev sergeiandreyev merged commit ddb601a into IHP-GmbH:dev Jan 8, 2025
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4 participants