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qemu-arm: Merge RISC-V 32-bit support into qemu-arm port.
Currently both the qemu-arm and qemu-riscv ports share a lot of code and functionality. This commit merges the qemu-riscv port into the qemu-arm port. The only real differences between the two are the toolchains used to build the code, and the initialisation/startup framework. Everything else is pretty much the same, so this brings the following benefits: - less code duplication - less burden on maintenance - generalised qemu port, could in the future support other architectures A new board `VIRT_RV32` has been added to the qemu-arm port which is the existing RISC-V board from the qemu-riscv port. To build it: $ make BOARD=VIRT_RV32 repl To cleanly separate the code for the different architectures, startup code has been moved to ports/qemu-arm/mcu/<arch>/. Signed-off-by: Damien George <damien@micropython.org>
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Original file line number | Diff line number | Diff line change |
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QEMU_ARCH = riscv32 | ||
QEMU_MACHINE = virt | ||
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CFLAGS += -DQEMU_SOC_VIRT | ||
CFLAGS += -DMICROPY_HW_MCU_NAME='"$(RV32_ARCH)"' | ||
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LDSCRIPT = mcu/rv32/virt.ld | ||
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SRC_BOARD_O += shared/runtime/gchelper_native.o shared/runtime/gchelper_rv32i.o | ||
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MPY_CROSS_FLAGS += -march=rv32imc | ||
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# These Thumb tests don't run on RV32, so exclude them. | ||
RUN_TESTS_ARGS = --exclude 'inlineasm|qemu-arm/asm_test' |
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* THE SOFTWARE. | ||
*/ | ||
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#include <stddef.h> | ||
#include "shared/runtime/interrupt_char.h" |
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