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ports/psoc6: Removed invert functionality.
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Signed-off-by: NikhitaR-IFX <Nikhita.Rajasekhar@infineon.com>
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NikhitaR-IFX committed Feb 12, 2024
1 parent 8347117 commit 3ecab8b
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Showing 3 changed files with 22 additions and 28 deletions.
10 changes: 5 additions & 5 deletions ports/psoc6/machine_pwm.c
Original file line number Diff line number Diff line change
Expand Up @@ -73,9 +73,9 @@ STATIC inline cy_rslt_t pwm_duty_set_ns(cyhal_pwm_t *pwm_obj, uint32_t fz, uint3
return cyhal_pwm_set_period(pwm_obj, 1000000 / fz, pulse_width / 1000); // !# * --> /
}

STATIC inline cy_rslt_t pwm_advanced_init(machine_pwm_obj_t *machine_pwm_obj) {
/*STATIC inline cy_rslt_t pwm_advanced_init(machine_pwm_obj_t *machine_pwm_obj) {
return cyhal_pwm_init_adv(&machine_pwm_obj->pwm_obj, machine_pwm_obj->pin->addr, NC, CYHAL_PWM_LEFT_ALIGN, true, 0, true, NULL); // complimentary pin set as not connected
}
}*/

STATIC void mp_machine_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
machine_pwm_obj_t *self = MP_OBJ_TO_PTR(self_in);
Expand All @@ -89,7 +89,7 @@ STATIC void mp_machine_pwm_init_helper(machine_pwm_obj_t *self,
{ MP_QSTR_freq, MP_ARG_INT, {.u_int = VALUE_NOT_SET} },
{ MP_QSTR_duty_u16, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = VALUE_NOT_SET} },
{ MP_QSTR_duty_ns, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = VALUE_NOT_SET} },
{ MP_QSTR_invert, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = VALUE_NOT_SET} },
// { MP_QSTR_invert, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = VALUE_NOT_SET} },
};

// Parse the arguments.
Expand Down Expand Up @@ -117,7 +117,7 @@ STATIC void mp_machine_pwm_init_helper(machine_pwm_obj_t *self,
}

// inverts the respective output if the value is True
if (args[ARG_invert].u_int != VALUE_NOT_SET) {
/*if (args[ARG_invert].u_int != VALUE_NOT_SET) {
self->invert = args[ARG_invert].u_int;
if (self->invert == 1) {
cyhal_pwm_free(&self->pwm_obj);
Expand All @@ -128,7 +128,7 @@ STATIC void mp_machine_pwm_init_helper(machine_pwm_obj_t *self,
self->duty_type = DUTY_U16;
self->duty = ((1) - ((self->duty) / 65535)) * 65535;
}
}
}*/
cyhal_pwm_start(&self->pwm_obj);
}

Expand Down
32 changes: 13 additions & 19 deletions tests/psoc6/dut/pwm.py
Original file line number Diff line number Diff line change
@@ -1,9 +1,7 @@
# PWM test
from machine import PWM, Pin

import os
import time
from machine import PWM, Pin
import time

# Allocate pin based on board
machine = os.uname().machine
Expand All @@ -30,13 +28,13 @@ def _print_val(params_list, print_list=False):
print(f"{params[0]} = {params[1]}")


def measure_non_inverted_signal():
def measure_signal():
global start_time
if input_pin.value() == 1:
start_time = time.ticks_us()
wait_for_low()
return
measure_non_inverted_signal()
measure_signal()


def wait_for_low():
Expand All @@ -54,7 +52,7 @@ def wait_for_high():
high_signal_start_time = time.ticks_us()


def validate_signal(exp_freq=0, exp_duty_u16=0, exp_duty_ns=0, exp_dutycycle=0, exp_invert=0):
def validate_signal(exp_freq=0, exp_duty_u16=0, exp_duty_ns=0, exp_dutycycle=0):
on_time = time.ticks_diff(low_signal_start_time, start_time)
off_time = time.ticks_diff(high_signal_start_time, low_signal_start_time)
time_period = on_time + off_time
Expand Down Expand Up @@ -88,7 +86,7 @@ def validate_signal(exp_freq=0, exp_duty_u16=0, exp_duty_ns=0, exp_dutycycle=0,


# T = 1sec (25% dc)
pwm = PWM(pwm_pin, freq=1, duty_ns=250000000, invert=0)
pwm = PWM(pwm_pin, freq=1, duty_ns=250000000)
# Let the first pulse pass
time.sleep(1)
print(
Expand All @@ -97,10 +95,9 @@ def validate_signal(exp_freq=0, exp_duty_u16=0, exp_duty_ns=0, exp_dutycycle=0,
", duty_on(ns): ",
pwm.duty_ns(),
", dutycycle(%): 25%",
", invert_config: 0",
)
measure_non_inverted_signal()
validate_signal(exp_freq=1, exp_duty_u16=0, exp_duty_ns=250000000, exp_dutycycle=25, exp_invert=0)
measure_signal()
validate_signal(exp_freq=1, exp_duty_u16=0, exp_duty_ns=250000000, exp_dutycycle=25)

# T = 1sec (50% dc)
pwm.duty_ns(500000000)
Expand All @@ -112,10 +109,9 @@ def validate_signal(exp_freq=0, exp_duty_u16=0, exp_duty_ns=0, exp_dutycycle=0,
", duty_on(ns): ",
pwm.duty_ns(),
", dutycycle(%): 50%",
", invert_config: 0",
)
measure_non_inverted_signal()
validate_signal(exp_freq=1, exp_duty_u16=0, exp_duty_ns=500000000, exp_dutycycle=50, exp_invert=0)
measure_signal()
validate_signal(exp_freq=1, exp_duty_u16=0, exp_duty_ns=500000000, exp_dutycycle=50)

# T = 1sec (75% dc)
pwm.duty_u16(49151)
Expand All @@ -127,10 +123,9 @@ def validate_signal(exp_freq=0, exp_duty_u16=0, exp_duty_ns=0, exp_dutycycle=0,
", duty_u16(raw): ",
pwm.duty_u16(),
", dutycycle(%): 75%",
", invert_config: 0",
)
measure_non_inverted_signal()
validate_signal(exp_freq=1, exp_duty_u16=49151, exp_duty_ns=0, exp_dutycycle=75, exp_invert=0)
measure_signal()
validate_signal(exp_freq=1, exp_duty_u16=49151, exp_duty_ns=0, exp_dutycycle=75)

# Reconfigure frequency and dutycycle T = 1sec (50% dc)
pwm.init(freq=2, duty_u16=32767)
Expand All @@ -142,9 +137,8 @@ def validate_signal(exp_freq=0, exp_duty_u16=0, exp_duty_ns=0, exp_dutycycle=0,
", duty_u16(raw): ",
pwm.duty_u16(),
", dutycycle(%): 50%",
", invert_config: 0",
)
measure_non_inverted_signal()
validate_signal(exp_freq=2, exp_duty_u16=32767, exp_duty_ns=0, exp_dutycycle=50, exp_invert=0)
measure_signal()
validate_signal(exp_freq=2, exp_duty_u16=32767, exp_duty_ns=0, exp_dutycycle=50)

pwm.deinit()
8 changes: 4 additions & 4 deletions tests/psoc6/dut/pwm.py.exp
Original file line number Diff line number Diff line change
@@ -1,27 +1,27 @@

Test Case 1:
freq(Hz): 1 , duty_on(ns): 2.5e+08 , dutycycle(%): 25% , invert_config: 0
freq(Hz): 1 , duty_on(ns): 2.5e+08 , dutycycle(%): 25%

Expected freq(Hz) approx same as set freq(Hz) and experimentally calculated freq(Hz): True
Dutycycle(ns) value is same as set value: True
Expected duty cycle(%) approx same as experimental duty cycle(%): True

Test Case 2:
freq(Hz): 1 , duty_on(ns): 5e+08 , dutycycle(%): 50% , invert_config: 0
freq(Hz): 1 , duty_on(ns): 5e+08 , dutycycle(%): 50%

Expected freq(Hz) approx same as set freq(Hz) and experimentally calculated freq(Hz): True
Dutycycle(ns) value is same as set value: True
Expected duty cycle(%) approx same as experimental duty cycle(%): True

Test Case 3:
freq(Hz): 1 , duty_u16(raw): 49151.0 , dutycycle(%): 75% , invert_config: 0
freq(Hz): 1 , duty_u16(raw): 49151.0 , dutycycle(%): 75%

Expected freq(Hz) approx same as set freq(Hz) and experimentally calculated freq(Hz): True
Dutycycle(raw) value is same as set value: True
Expected duty cycle(%) approx same as experimental duty cycle(%): True

Test Case 4:
freq(Hz): 2 , duty_u16(raw): 32767.0 , dutycycle(%): 50% , invert_config: 0
freq(Hz): 2 , duty_u16(raw): 32767.0 , dutycycle(%): 50%

Expected freq(Hz) approx same as set freq(Hz) and experimentally calculated freq(Hz): True
Dutycycle(raw) value is same as set value: True
Expand Down

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