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ports/psoc6: Integrating pin refactor and make_pins feature.
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Signed-off-by: NikhitaR-IFX <Nikhita.Rajasekhar@infineon.com>
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@NikhitaR-IFX
NikhitaR-IFX committed Oct 19, 2023
1 parent 62b4bc9 commit 554a66e
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Showing 5 changed files with 35 additions and 142 deletions.
2 changes: 1 addition & 1 deletion ports/psoc6/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -236,7 +236,7 @@ build: mtb_get_build_flags make_pins_csv $(MPY_PATH_TO_MAIN_MAKEFILE) $(MPY_MAIN

all: build

#clean: mtb_clean
clean: mtb_clean

rebuild: clean mtb_clean all

Expand Down
25 changes: 15 additions & 10 deletions ports/psoc6/boards/make-pins.py
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@
prefix_content = '#include <stdio.h> \n \
#include "py/obj.h" \n \
#include "py/mphal.h" \n \
#include "modules/machine/pins.h"\n '
#include "modules/machine/machine_pin_phy.h"\n '


class NamedPin(object):
Expand All @@ -28,6 +28,7 @@ def __init__(self, name, pin_addr, pin_exp):
self._name = name
self._pin_addr = pin_addr
self._pin_exp = pin_exp
self._pin_func = "PIN_PHY_FUNC_NONE"
self._board_pin = False

def cpu_pin_name(self):
Expand All @@ -44,7 +45,7 @@ def set_board_index(self, index):

def print(self):
"""print(
"const machine_pin_obj_t pin_{:s}_obj = PIN({:s}, {:s});".format(
"const machine_pin_phy_obj_t pin_{:s}_obj = PIN({:s}, {:s});".format(
self._name,
self._name,
self._pin_addr,
Expand All @@ -54,20 +55,24 @@ def print(self):

def print_header(self, hdr_file):
n = self.cpu_pin_name()
hdr_file.write("extern const machine_pin_obj_t pin_{:s}_obj;\n".format(n))
hdr_file.write("extern const machine_pin_phy_obj_t pin_{:s}_obj;\n".format(n))

def qstr_list(self):
return [self._name]

def print_const_table_entry(self):
print('{{{{ &machine_pin_type}},{:s}, "{:s}"}},'.format(self._pin_exp, self._name))
print('{{{:s}, "{:s}", {:s}}},'.format(self._pin_exp, self._name, self._pin_func))

# def print_const_table_entry(self):
# print('{{{{ &machine_pin_type}},{:s}, "{:s}"}},'.format(self._pin_exp, self._name))


class Pins(object):
def __init__(self):
self.cpu_pins = [] # list of NamedPin objects
self.board_pins = [] # list of NamedPin objects
self.board_pin_csv_path = ""
self.num_cpu_pins = 0

def find_pin(self, cpu_pin_name):
for named_pin in self.cpu_pins:
Expand All @@ -76,17 +81,17 @@ def find_pin(self, cpu_pin_name):
return pin

def print_const_table(self):
num_cpu_pins = 0
# num_cpu_pins = 0
for named_pin in self.cpu_pins:
pin = named_pin.pin()
if pin.is_board_pin():
pin.set_board_index(num_cpu_pins)
num_cpu_pins += 1
pin.set_board_index(self.num_cpu_pins)
self.num_cpu_pins += 1
print("")
print(prefix_content)
print("const uint8_t machine_pin_num_of_cpu_pins = {:d};".format(num_cpu_pins))
print("const uint8_t machine_pin_num_of_cpu_pins = {:d};".format(self.num_cpu_pins))
print("")
print("const machine_pin_obj_t machine_pin_obj[{:d}] = {{".format(num_cpu_pins))
print("machine_pin_phy_obj_t machine_pin_phy_obj[{:d}] = {{".format(self.num_cpu_pins))
for named_pin in self.cpu_pins:
pin = named_pin.pin()
if pin.is_board_pin():
Expand Down Expand Up @@ -131,7 +136,7 @@ def print_named(self, label, named_pins):
pin = named_pin.pin()
if pin.is_board_pin():
print(
" {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&machine_pin_obj[{:d}]) }},".format(
" {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&machine_pin_phy_obj[{:d}]) }},".format(
named_pin.name(), num_cpu_pins
)
)
Expand Down
10 changes: 5 additions & 5 deletions ports/psoc6/modules/machine/machine_pin.c
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Original file line number Diff line number Diff line change
Expand Up @@ -21,13 +21,13 @@ typedef struct _machine_pin_io_obj_t {
uint8_t pull;
} machine_pin_io_obj_t;

#define MAX_PIN_IO MP_ARRAY_SIZE(machine_pin_phy_obj)
machine_pin_io_obj_t *pin_io[MAX_PIN_IO] = {NULL};

machine_pin_io_obj_t *pin_io[102] = {NULL};

static inline machine_pin_io_obj_t *pin_io_allocate(mp_obj_t pin_name) {
machine_pin_phy_obj_t *pin_phy = pin_phy_realloc(pin_name, PIN_PHY_FUNC_DIO);
uint16_t i;
for (i = 0; i < MAX_PIN_IO; i++) {
for (i = 0; i < machine_pin_num_of_cpu_pins; i++) {
if (pin_io[i] == NULL) {
break;
}
Expand All @@ -40,7 +40,7 @@ static inline machine_pin_io_obj_t *pin_io_allocate(mp_obj_t pin_name) {

static inline void pin_io_free(machine_pin_io_obj_t *pin) {
pin_phy_free(pin->pin_phy);
for (uint16_t i = 0; i < MAX_PIN_IO; i++) {
for (uint16_t i = 0; i < machine_pin_num_of_cpu_pins; i++) {
if (pin_io[i] == pin) {
pin_io[i] = NULL;
}
Expand Down Expand Up @@ -344,7 +344,7 @@ STATIC const mp_rom_map_elem_t machine_pin_locals_dict_table[] = {
STATIC MP_DEFINE_CONST_DICT(machine_pin_locals_dict, machine_pin_locals_dict_table);

void mod_pin_deinit() {
for (uint8_t i = 0; i < MAX_PIN_IO; i++) {
for (uint8_t i = 0; i < machine_pin_num_of_cpu_pins; i++) {
if (pin_io[i] != NULL) {
machine_pin_obj_deinit(pin_io[i]);
}
Expand Down
16 changes: 9 additions & 7 deletions ports/psoc6/modules/machine/machine_pin_phy.c
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Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,9 @@
#include "py/mphal.h"
#include "machine_pin_phy.h"

machine_pin_phy_obj_t machine_pin_phy_obj[] = {
// extern const uint8_t machine_pin_num_of_cpu_pins;

/*machine_pin_phy_obj_t machine_pin_phy_obj[] = {
{PIN_P0_0, "P0_0", PIN_PHY_FUNC_NONE},
{PIN_P0_1, "P0_1", PIN_PHY_FUNC_NONE},
{PIN_P0_2, "P0_2", PIN_PHY_FUNC_NONE},
Expand Down Expand Up @@ -119,15 +121,15 @@ machine_pin_phy_obj_t machine_pin_phy_obj[] = {
{PIN_USBDP, "USBDP", PIN_PHY_FUNC_NONE},
{PIN_USBDM, "USBDM", PIN_PHY_FUNC_NONE}
};
};*/

// Function definitions
// helper function to translate pin_name(string) into machine_pin_io_obj_t index.
int pin_find(mp_obj_t pin) {
int wanted_pin = -1;
if (mp_obj_is_small_int(pin)) {
int pin_addr = mp_obj_get_int(pin);
for (int i = 0; i < MP_ARRAY_SIZE(machine_pin_phy_obj); i++) {
for (int i = 0; i < machine_pin_num_of_cpu_pins; i++) {
if (machine_pin_phy_obj[i].addr == pin_addr) {
wanted_pin = i;
break;
Expand All @@ -137,15 +139,15 @@ int pin_find(mp_obj_t pin) {
// Search by name
size_t slen;
const char *s = mp_obj_str_get_data(pin, &slen);
for (int i = 0; i < MP_ARRAY_SIZE(machine_pin_phy_obj); i++) {
for (int i = 0; i < machine_pin_num_of_cpu_pins; i++) {
if (slen == strlen(machine_pin_phy_obj[i].name) && strncmp(s, machine_pin_phy_obj[i].name, slen) == 0) {
wanted_pin = i;
break;
}
}
}

if (!(0 <= wanted_pin && wanted_pin < MP_ARRAY_SIZE(machine_pin_phy_obj))) {
if (!(0 <= wanted_pin && wanted_pin < machine_pin_num_of_cpu_pins)) {
mp_raise_ValueError(MP_ERROR_TEXT("invalid pin: Pin not defined!"));
}

Expand Down Expand Up @@ -175,7 +177,7 @@ int pin_addr_by_name(mp_obj_t pin) {
machine_pin_phy_obj_t *pin_phy_find_by_name(mp_obj_t pin_name) {
size_t slen;
const char *s = mp_obj_str_get_data(pin_name, &slen);
for (int i = 0; i < MP_ARRAY_SIZE(machine_pin_phy_obj); i++) {
for (int i = 0; i < machine_pin_num_of_cpu_pins; i++) {
if (slen == strlen(machine_pin_phy_obj[i].name) && strncmp(s, machine_pin_phy_obj[i].name, slen) == 0) {
return &machine_pin_phy_obj[i];
}
Expand Down Expand Up @@ -219,7 +221,7 @@ void pin_phy_free(machine_pin_phy_obj_t *pin_phy) {


void mod_pin_phy_deinit(void) {
for (int i = 0; i < MP_ARRAY_SIZE(machine_pin_phy_obj); i++) {
for (int i = 0; i < machine_pin_num_of_cpu_pins; i++) {
pin_phy_free(&machine_pin_phy_obj[i]);
}
}
124 changes: 5 additions & 119 deletions ports/psoc6/modules/machine/machine_pin_phy.h
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Original file line number Diff line number Diff line change
Expand Up @@ -18,8 +18,11 @@ typedef struct _machine_pin_phy_obj_t {
machine_pin_phy_func_t allocated_func;
} machine_pin_phy_obj_t;

#define PIN_PHY_NUM_MAX 115
extern machine_pin_phy_obj_t machine_pin_phy_obj[PIN_PHY_NUM_MAX];
#include "genhdr/pins.h"

extern machine_pin_phy_obj_t machine_pin_phy_obj[];

extern const uint8_t machine_pin_num_of_cpu_pins;

bool pin_phy_is_alloc(machine_pin_phy_obj_t *obj);
machine_pin_phy_obj_t *pin_phy_alloc(mp_obj_t pin_name, machine_pin_phy_func_t func);
Expand All @@ -33,121 +36,4 @@ int pin_find(mp_obj_t obj);
mp_obj_t pin_name_by_addr(mp_obj_t pin);
int pin_addr_by_name(mp_obj_t obj);

#define PIN_P0_0 CYHAL_GET_GPIO(CYHAL_PORT_0, 0)// !< Port 0 Pin 0
#define PIN_P0_1 CYHAL_GET_GPIO(CYHAL_PORT_0, 1)// !< Port 0 Pin 1
#define PIN_P0_2 CYHAL_GET_GPIO(CYHAL_PORT_0, 2)// !< Port 0 Pin 2
#define PIN_P0_3 CYHAL_GET_GPIO(CYHAL_PORT_0, 3)// !< Port 0 Pin 3
#define PIN_P0_4 CYHAL_GET_GPIO(CYHAL_PORT_0, 4)// !< Port 0 Pin 4
#define PIN_P0_5 CYHAL_GET_GPIO(CYHAL_PORT_0, 5)// !< Port 0 Pin 5

#define PIN_P1_0 CYHAL_GET_GPIO(CYHAL_PORT_1, 0)// !< Port 1 Pin 0
#define PIN_P1_1 CYHAL_GET_GPIO(CYHAL_PORT_1, 1)// !< Port 1 Pin 1
#define PIN_P1_2 CYHAL_GET_GPIO(CYHAL_PORT_1, 2)// !< Port 1 Pin 2
#define PIN_P1_3 CYHAL_GET_GPIO(CYHAL_PORT_1, 3)// !< Port 1 Pin 3
#define PIN_P1_4 CYHAL_GET_GPIO(CYHAL_PORT_1, 4)// !< Port 1 Pin 4
#define PIN_P1_5 CYHAL_GET_GPIO(CYHAL_PORT_1, 5)// !< Port 1 Pin 5

#define PIN_P2_0 CYHAL_GET_GPIO(CYHAL_PORT_2, 0)// !< Port 2 Pin 0
#define PIN_P2_1 CYHAL_GET_GPIO(CYHAL_PORT_2, 1)// !< Port 2 Pin 1
#define PIN_P2_2 CYHAL_GET_GPIO(CYHAL_PORT_2, 2)// !< Port 2 Pin 2
#define PIN_P2_3 CYHAL_GET_GPIO(CYHAL_PORT_2, 3)// !< Port 2 Pin 3
#define PIN_P2_4 CYHAL_GET_GPIO(CYHAL_PORT_2, 4)// !< Port 2 Pin 4
#define PIN_P2_5 CYHAL_GET_GPIO(CYHAL_PORT_2, 5)// !< Port 2 Pin 5
#define PIN_P2_6 CYHAL_GET_GPIO(CYHAL_PORT_2, 6)// !< Port 2 Pin 6
#define PIN_P2_7 CYHAL_GET_GPIO(CYHAL_PORT_2, 7)// !< Port 2 Pin 7

#define PIN_P3_0 CYHAL_GET_GPIO(CYHAL_PORT_3, 0)// !< Port 3 Pin 0
#define PIN_P3_1 CYHAL_GET_GPIO(CYHAL_PORT_3, 1)// !< Port 3 Pin 1
#define PIN_P3_2 CYHAL_GET_GPIO(CYHAL_PORT_3, 2)// !< Port 3 Pin 2
#define PIN_P3_3 CYHAL_GET_GPIO(CYHAL_PORT_3, 3)// !< Port 3 Pin 3
#define PIN_P3_4 CYHAL_GET_GPIO(CYHAL_PORT_3, 4)// !< Port 3 Pin 4
#define PIN_P3_5 CYHAL_GET_GPIO(CYHAL_PORT_3, 5)// !< Port 3 Pin 5

#define PIN_P4_0 CYHAL_GET_GPIO(CYHAL_PORT_4, 0)// !< Port 4 Pin 0
#define PIN_P4_1 CYHAL_GET_GPIO(CYHAL_PORT_4, 1)// !< Port 4 Pin 1

#define PIN_P5_0 CYHAL_GET_GPIO(CYHAL_PORT_5, 0)// !< Port 5 Pin 0
#define PIN_P5_1 CYHAL_GET_GPIO(CYHAL_PORT_5, 1)// !< Port 5 Pin 1
#define PIN_P5_2 CYHAL_GET_GPIO(CYHAL_PORT_5, 2)// !< Port 5 Pin 2
#define PIN_P5_3 CYHAL_GET_GPIO(CYHAL_PORT_5, 3)// !< Port 5 Pin 3
#define PIN_P5_4 CYHAL_GET_GPIO(CYHAL_PORT_5, 4)// !< Port 5 Pin 4
#define PIN_P5_5 CYHAL_GET_GPIO(CYHAL_PORT_5, 5)// !< Port 5 Pin 5
#define PIN_P5_6 CYHAL_GET_GPIO(CYHAL_PORT_5, 6)// !< Port 5 Pin 6
#define PIN_P5_7 CYHAL_GET_GPIO(CYHAL_PORT_5, 7)// !< Port 5 Pin 7

#define PIN_P6_0 CYHAL_GET_GPIO(CYHAL_PORT_6, 0)// !< Port 6 Pin 0
#define PIN_P6_1 CYHAL_GET_GPIO(CYHAL_PORT_6, 1)// !< Port 6 Pin 1
#define PIN_P6_2 CYHAL_GET_GPIO(CYHAL_PORT_6, 2)// !< Port 6 Pin 2
#define PIN_P6_3 CYHAL_GET_GPIO(CYHAL_PORT_6, 3)// !< Port 6 Pin 3
#define PIN_P6_4 CYHAL_GET_GPIO(CYHAL_PORT_6, 4)// !< Port 6 Pin 4
#define PIN_P6_5 CYHAL_GET_GPIO(CYHAL_PORT_6, 5)// !< Port 6 Pin 5
#define PIN_P6_6 CYHAL_GET_GPIO(CYHAL_PORT_6, 6)// !< Port 6 Pin 6
#define PIN_P6_7 CYHAL_GET_GPIO(CYHAL_PORT_6, 7)// !< Port 6 Pin 7

#define PIN_P7_0 CYHAL_GET_GPIO(CYHAL_PORT_7, 0)// !< Port 7 Pin 0
#define PIN_P7_1 CYHAL_GET_GPIO(CYHAL_PORT_7, 1)// !< Port 7 Pin 1
#define PIN_P7_2 CYHAL_GET_GPIO(CYHAL_PORT_7, 2)// !< Port 7 Pin 2
#define PIN_P7_3 CYHAL_GET_GPIO(CYHAL_PORT_7, 3)// !< Port 7 Pin 3
#define PIN_P7_4 CYHAL_GET_GPIO(CYHAL_PORT_7, 4)// !< Port 7 Pin 4
#define PIN_P7_5 CYHAL_GET_GPIO(CYHAL_PORT_7, 5)// !< Port 7 Pin 5
#define PIN_P7_6 CYHAL_GET_GPIO(CYHAL_PORT_7, 6)// !< Port 7 Pin 6
#define PIN_P7_7 CYHAL_GET_GPIO(CYHAL_PORT_7, 7)// !< Port 7 Pin 7

#define PIN_P8_0 CYHAL_GET_GPIO(CYHAL_PORT_8, 0)// !< Port 8 Pin 0
#define PIN_P8_1 CYHAL_GET_GPIO(CYHAL_PORT_8, 1)// !< Port 8 Pin 1
#define PIN_P8_2 CYHAL_GET_GPIO(CYHAL_PORT_8, 2)// !< Port 8 Pin 2
#define PIN_P8_3 CYHAL_GET_GPIO(CYHAL_PORT_8, 3)// !< Port 8 Pin 3
#define PIN_P8_4 CYHAL_GET_GPIO(CYHAL_PORT_8, 4)// !< Port 8 Pin 4
#define PIN_P8_5 CYHAL_GET_GPIO(CYHAL_PORT_8, 5)// !< Port 8 Pin 5
#define PIN_P8_6 CYHAL_GET_GPIO(CYHAL_PORT_8, 6)// !< Port 8 Pin 6
#define PIN_P8_7 CYHAL_GET_GPIO(CYHAL_PORT_8, 7)// !< Port 8 Pin 7

#define PIN_P9_0 CYHAL_GET_GPIO(CYHAL_PORT_9, 0)// !< Port 9 Pin 0
#define PIN_P9_1 CYHAL_GET_GPIO(CYHAL_PORT_9, 1)// !< Port 9 Pin 1
#define PIN_P9_2 CYHAL_GET_GPIO(CYHAL_PORT_9, 2)// !< Port 9 Pin 2
#define PIN_P9_3 CYHAL_GET_GPIO(CYHAL_PORT_9, 3)// !< Port 9 Pin 3
#define PIN_P9_4 CYHAL_GET_GPIO(CYHAL_PORT_9, 4)// !< Port 9 Pin 4
#define PIN_P9_5 CYHAL_GET_GPIO(CYHAL_PORT_9, 5)// !< Port 9 Pin 5
#define PIN_P9_6 CYHAL_GET_GPIO(CYHAL_PORT_9, 6)// !< Port 9 Pin 6
#define PIN_P9_7 CYHAL_GET_GPIO(CYHAL_PORT_9, 7)// !< Port 9 Pin 7

#define PIN_P10_0 CYHAL_GET_GPIO(CYHAL_PORT_10, 0)// !< Port 10 Pin 0
#define PIN_P10_1 CYHAL_GET_GPIO(CYHAL_PORT_10, 1)// !< Port 10 Pin 1
#define PIN_P10_2 CYHAL_GET_GPIO(CYHAL_PORT_10, 2)// !< Port 10 Pin 2
#define PIN_P10_3 CYHAL_GET_GPIO(CYHAL_PORT_10, 3)// !< Port 10 Pin 3
#define PIN_P10_4 CYHAL_GET_GPIO(CYHAL_PORT_10, 4)// !< Port 10 Pin 4
#define PIN_P10_5 CYHAL_GET_GPIO(CYHAL_PORT_10, 5)// !< Port 10 Pin 5
#define PIN_P10_6 CYHAL_GET_GPIO(CYHAL_PORT_10, 6)// !< Port 10 Pin 6
#define PIN_P10_7 CYHAL_GET_GPIO(CYHAL_PORT_10, 7)// !< Port 10 Pin 7

#define PIN_P11_0 CYHAL_GET_GPIO(CYHAL_PORT_11, 0)// !< Port 11 Pin 0
#define PIN_P11_1 CYHAL_GET_GPIO(CYHAL_PORT_11, 1)// !< Port 11 Pin 1
#define PIN_P11_2 CYHAL_GET_GPIO(CYHAL_PORT_11, 2)// !< Port 11 Pin 2
#define PIN_P11_3 CYHAL_GET_GPIO(CYHAL_PORT_11, 3)// !< Port 11 Pin 3
#define PIN_P11_4 CYHAL_GET_GPIO(CYHAL_PORT_11, 4)// !< Port 11 Pin 4
#define PIN_P11_5 CYHAL_GET_GPIO(CYHAL_PORT_11, 5)// !< Port 11 Pin 5
#define PIN_P11_6 CYHAL_GET_GPIO(CYHAL_PORT_11, 6)// !< Port 11 Pin 6
#define PIN_P11_7 CYHAL_GET_GPIO(CYHAL_PORT_11, 7)// !< Port 11 Pin 7

#define PIN_P12_0 CYHAL_GET_GPIO(CYHAL_PORT_12, 0)// !< Port 12 Pin 0
#define PIN_P12_1 CYHAL_GET_GPIO(CYHAL_PORT_12, 1)// !< Port 12 Pin 1
#define PIN_P12_2 CYHAL_GET_GPIO(CYHAL_PORT_12, 2)// !< Port 12 Pin 2
#define PIN_P12_3 CYHAL_GET_GPIO(CYHAL_PORT_12, 3)// !< Port 12 Pin 3
#define PIN_P12_4 CYHAL_GET_GPIO(CYHAL_PORT_12, 4)// !< Port 12 Pin 4
#define PIN_P12_5 CYHAL_GET_GPIO(CYHAL_PORT_12, 5)// !< Port 12 Pin 5
#define PIN_P12_6 CYHAL_GET_GPIO(CYHAL_PORT_12, 6)// !< Port 12 Pin 6
#define PIN_P12_7 CYHAL_GET_GPIO(CYHAL_PORT_12, 7)// !< Port 12 Pin 7

#define PIN_P13_0 CYHAL_GET_GPIO(CYHAL_PORT_13, 0)// !< Port 13 Pin 0
#define PIN_P13_1 CYHAL_GET_GPIO(CYHAL_PORT_13, 1)// !< Port 13 Pin 1
#define PIN_P13_2 CYHAL_GET_GPIO(CYHAL_PORT_13, 2)// !< Port 13 Pin 2
#define PIN_P13_3 CYHAL_GET_GPIO(CYHAL_PORT_13, 3)// !< Port 13 Pin 3
#define PIN_P13_4 CYHAL_GET_GPIO(CYHAL_PORT_13, 4)// !< Port 13 Pin 4
#define PIN_P13_5 CYHAL_GET_GPIO(CYHAL_PORT_13, 5)// !< Port 13 Pin 5
#define PIN_P13_6 CYHAL_GET_GPIO(CYHAL_PORT_13, 6)// !< Port 13 Pin 6
#define PIN_P13_7 CYHAL_GET_GPIO(CYHAL_PORT_13, 7)// !< Port 13 Pin 7

#define PIN_USBDP CYHAL_GET_GPIO(CYHAL_PORT_14, 0)// !< Port 14 Pin 0
#define PIN_USBDM CYHAL_GET_GPIO(CYHAL_PORT_14, 1)// !< Port 14 Pin 1

#endif // MICROPY_INCLUDED_MACHINE_PIN_PHY_H

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