ports/psoc6: Syncing with latest multi-bsp-support.

Signed-off-by: NikhitaR-IFX <Nikhita.Rajasekhar@infineon.com>
Infineon · Sep 12, 2023 · 6644678 · 6644678
1 parent 0bbb71f
commit 6644678
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Showing 3 changed files with 2 additions and 3 deletions.
diff --git a/ports/psoc6/Makefile b/ports/psoc6/Makefile
@@ -210,7 +210,7 @@ build: mtb_get_build_flags $(MPY_PATH_TO_MAIN_MAKEFILE) $(MPY_MAIN_BUILD_DIR)/fi
 
 all: build
 
-#clean: mtb_clean
+clean: mtb_clean
 
 rebuild: clean mtb_clean all
 

diff --git a/ports/psoc6/boards/make-pins.py b/ports/psoc6/boards/make-pins.py
@@ -159,7 +159,6 @@ def parse_af_file(self, filename):
                 self.cpu_pins.append(NamedPin(pin_name, pin))
 
     def parse_board_file(self):
-        print("HI", self.board_pin_csv_path)
         with open(self.board_pin_csv_path, "r") as csvfile:
             rows = csv.reader(csvfile)
             for row in rows:

diff --git a/ports/psoc6/mtb-libs/Makefile b/ports/psoc6/mtb-libs/Makefile
@@ -42,7 +42,7 @@ MTB_TYPE=COMBINED
 # configurations. If TARGET is manually edited, ensure TARGET_<BSP>.mtb with a
 # valid URL exists in the application, run 'make getlibs' to fetch BSP contents
 # and update or regenerate launch configurations for your IDE.
-TARGET=APP_CY8CPROTO-062-4343W
+TARGET=APP_CY8CPROTO-063-BLE
 
 # # Board dependencies
 # ifeq ($(TARGET),APP_CY8CPROTO-062-4343W)