mimxrt/boards/MIMXRT1176_clock_config: Fix comments about UART clocks.

No functional change, and pretty obvious. Signed-off-by: robert-hh <robert@hammelrath.com>
Infineon · Sep 29, 2023 · abb4469 · abb4469
1 parent 0701341
commit abb4469
Showing 1 changed file with 12 additions and 12 deletions.
diff --git a/ports/mimxrt/boards/MIMXRT1176_clock_config.c b/ports/mimxrt/boards/MIMXRT1176_clock_config.c
@@ -382,62 +382,62 @@ void BOARD_BootClockRUN(void) {
     rootCfg.div = 1;
     CLOCK_SetRootClock(kCLOCK_Root_Can3, &rootCfg);
 
-    /* Configure LPUART1 using SYS_PLL3_PFD3_CLK */
+    /* Configure LPUART1 using SYS_PLL2_PFD3_CLK */
     rootCfg.mux = kCLOCK_LPUART1_ClockRoot_MuxSysPll2Pfd3;
     rootCfg.div = 4;
     CLOCK_SetRootClock(kCLOCK_Root_Lpuart1, &rootCfg);
 
-    /* Configure LPUART2 using SYS_PLL3_PFD3_CLK */
+    /* Configure LPUART2 using SYS_PLL2_PFD3_CLK */
     rootCfg.mux = kCLOCK_LPUART2_ClockRoot_MuxSysPll2Pfd3;
     rootCfg.div = 4;
     CLOCK_SetRootClock(kCLOCK_Root_Lpuart2, &rootCfg);
 
-    /* Configure LPUART3 using SYS_PLL3_PFD3_CLK */
+    /* Configure LPUART3 using SYS_PLL2_PFD3_CLK */
     rootCfg.mux = kCLOCK_LPUART3_ClockRoot_MuxSysPll2Pfd3;
     rootCfg.div = 4;
     CLOCK_SetRootClock(kCLOCK_Root_Lpuart3, &rootCfg);
 
-    /* Configure LPUART4 using SYS_PLL3_PFD3_CLK */
+    /* Configure LPUART4 using SYS_PLL2_PFD3_CLK */
     rootCfg.mux = kCLOCK_LPUART4_ClockRoot_MuxSysPll2Pfd3;
     rootCfg.div = 4;
     CLOCK_SetRootClock(kCLOCK_Root_Lpuart4, &rootCfg);
 
-    /* Configure LPUART5 using SYS_PLL3_PFD3_CLK */
+    /* Configure LPUART5 using SYS_PLL2_PFD3_CLK */
     rootCfg.mux = kCLOCK_LPUART5_ClockRoot_MuxSysPll2Pfd3;
     rootCfg.div = 4;
     CLOCK_SetRootClock(kCLOCK_Root_Lpuart5, &rootCfg);
 
-    /* Configure LPUART6 using SYS_PLL3_PFD3_CLK */
+    /* Configure LPUART6 using SYS_PLL2_PFD3_CLK */
     rootCfg.mux = kCLOCK_LPUART6_ClockRoot_MuxSysPll2Pfd3;
     rootCfg.div = 4;
     CLOCK_SetRootClock(kCLOCK_Root_Lpuart6, &rootCfg);
 
-    /* Configure LPUART7 using SYS_PLL3_PFD3_CLK */
+    /* Configure LPUART7 using SYS_PLL2_PFD3_CLK */
     rootCfg.mux = kCLOCK_LPUART7_ClockRoot_MuxSysPll2Pfd3;
     rootCfg.div = 4;
     CLOCK_SetRootClock(kCLOCK_Root_Lpuart7, &rootCfg);
 
-    /* Configure LPUART8 using SYS_PLL3_PFD3_CLK */
+    /* Configure LPUART8 using SYS_PLL2_PFD3_CLK */
     rootCfg.mux = kCLOCK_LPUART8_ClockRoot_MuxSysPll2Pfd3;
     rootCfg.div = 4;
     CLOCK_SetRootClock(kCLOCK_Root_Lpuart8, &rootCfg);
 
-    /* Configure LPUART9 using SYS_PLL3_PFD3_CLK */
+    /* Configure LPUART9 using SYS_PLL2_PFD3_CLK */
     rootCfg.mux = kCLOCK_LPUART9_ClockRoot_MuxSysPll2Pfd3;
     rootCfg.div = 4;
     CLOCK_SetRootClock(kCLOCK_Root_Lpuart9, &rootCfg);
 
-    /* Configure LPUART10 using SYS_PLL3_PFD3_CLK */
+    /* Configure LPUART10 using SYS_PLL2_PFD3_CLK */
     rootCfg.mux = kCLOCK_LPUART10_ClockRoot_MuxSysPll2Pfd3;
     rootCfg.div = 4;
     CLOCK_SetRootClock(kCLOCK_Root_Lpuart10, &rootCfg);
 
-    /* Configure LPUART11 using SYS_PLL3_PFD3_CLK */
+    /* Configure LPUART11 using SYS_PLL2_PFD3_CLK */
     rootCfg.mux = kCLOCK_LPUART11_ClockRoot_MuxSysPll2Pfd3;
     rootCfg.div = 4;
     CLOCK_SetRootClock(kCLOCK_Root_Lpuart11, &rootCfg);
 
-    /* Configure LPUART12 using SYS_PLL3_PFD3_CLK */
+    /* Configure LPUART12 using SYS_PLL2_PFD3_CLK */
     rootCfg.mux = kCLOCK_LPUART12_ClockRoot_MuxSysPll2Pfd3;
     rootCfg.div = 4;
     CLOCK_SetRootClock(kCLOCK_Root_Lpuart12, &rootCfg);