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ports/psoc6 : WIP Modmachine.
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Signed-off-by: IFX-Anusha <Anusha.TR@infineon.com>
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IFX-Anusha authored and actions-user committed Apr 16, 2024
1 parent 4b35afa commit e82ec0e
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Showing 3 changed files with 64 additions and 9 deletions.
44 changes: 35 additions & 9 deletions ports/psoc6/modmachine.c
Original file line number Diff line number Diff line change
Expand Up @@ -86,16 +86,9 @@ static bool system_enable_global_irq(uint8_t state) {

// API to return clock freq; Fast CLK (CM4) is the main sys clk
static uint32_t system_get_cpu_freq(void) {
// return Cy_SysClk_ClkPathMuxGetFrequency(Cy_SysClk_ClkPathGetSource(0UL));
return Cy_SysClk_ClkFastGetFrequency();
}

// TODO: unused. Required ?
// API to return clock freq divider for Fast CLK (CM4)
// static uint8_t system_get_cpu_freq_div(void) {
// return Cy_SysClk_ClkFastGetDivider();
// }

void machine_init(void) {
mplogger_print("machine init\n");

Expand Down Expand Up @@ -198,11 +191,41 @@ static void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
}

static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
mp_raise_NotImplementedError(MP_ERROR_TEXT("Not implemented!!!\n"));
cy_rslt_t result;
if (n_args != 0) {
uint32_t expiry = mp_obj_get_int(args[0]);
cyhal_lptimer_t obj;
uint32_t actual_ms;
result = cyhal_syspm_tickless_sleep(&obj, expiry, &actual_ms);
if (result != CY_RSLT_SUCCESS) {
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("Light sleeep failed %lx !"), result);
}
} else {
result = cyhal_syspm_sleep();
if (result != CY_RSLT_SUCCESS) {
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("Light sleeep failed %lx !"), result);
}
}
}

NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
mp_raise_NotImplementedError(MP_ERROR_TEXT("Not implemented!!!\n"));
cy_rslt_t result;
if (n_args != 0) {
uint32_t expiry = mp_obj_get_int(args[0]);
cyhal_lptimer_t obj;
uint32_t actual_ms;
result = cyhal_syspm_tickless_deepsleep(&obj, expiry, &actual_ms);
if (result != CY_RSLT_SUCCESS) {
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("Deep sleeep failed %lx !"), result);
}
} else {
cy_rslt_t result = cyhal_syspm_deepsleep();
if (result != CY_RSLT_SUCCESS) {
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("Deep sleeep failed %lx !"), result);
}
}
for (;;) {
}
}

// machine.unique_id()
Expand Down Expand Up @@ -281,6 +304,9 @@ static void mp_machine_idle(void) {
{ MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&machine_info_obj) }, \
{ MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, \
\
{ MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, \
{ MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, \
\
/* class constants */ \
{ MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(MACHINE_PWRON_RESET) }, \
{ MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(MACHINE_HARD_RESET) }, \
Expand Down
29 changes: 29 additions & 0 deletions tests/psoc6/machine.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,29 @@
import machine


def hard_reset():
machine.reset()


def soft_reset():
machine.soft_reset()


def hard_reset_validate():
pass


def soft_reset_validate():
pass


def freq_get_validate():
freq = machine.freq()
if freq == 10000000:
print("Default Frequency")


def reset_cause():
machine.reset()
reset = machine.reset_cause()
# reset check comments..call each reset and then check the reset cause
Empty file added tests/psoc6/machine.py.exp
Empty file.

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