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ports/psoc6: Completed make-pins file and Makefile changes.
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Signed-off-by: NikhitaR-IFX <Nikhita.Rajasekhar@infineon.com>
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NikhitaR-IFX committed Sep 6, 2023
1 parent 07ea3cb commit ed3168c
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Showing 4 changed files with 382 additions and 5 deletions.
45 changes: 40 additions & 5 deletions ports/psoc6/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -233,11 +233,46 @@ export MTB_PIN_PACKAGES_PATH = ./mtb_shared/mtb-hal-cat1/release-v2.4.1/COMPONEN
export PINS_CSV_PATH = $(BOARD_DIR)/
MAKE_PINS = boards/make-pins.py

make_pins:
$(info )
$(info Executing make-pins.py to generate pin structure automatically)
$(Q)$(PYTHON) $(MAKE_PINS) --gen-pin-for cyhal_psoc6_02_124_bga.h --save-pins-csv-at pins.csv

ifeq ($(BOARD), CY8CPROTO-062-4343W)
PIN_PACKAGE_FILE = cyhal_psoc6_02_124_bga.h
endif
ifeq ($(BOARD), CY8CPROTO-063-BLE)
PIN_PACKAGE_FILE = cyhal_psoc6_03_68_qfn.h #ToDo: Check the right file and replace
endif

GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
BOARD_PINS = pins.csv
BOARD_AF_PINS = pins_af.csv
PREFIX_FILE = psoc6_prefix.c
HEADER_BUILD = $(BUILD)/genhdr
AF_FILE = boards/$(BOARD)/pins_af.csv

# Making OBJ use an order-only depenedency on the generated pins.h file
# has the side effect of making the pins.h file before we actually compile
# any of the objects. The normal dependency generation will deal with the
# case when pins.h is modified. But when it doesn't exist, we don't know
# which source files might need it.
$(OBJ): | $(GEN_PINS_HDR)
# Rule to generate pins.csv
$(BOARD_PINS) $(BOARD_AF_PINS):
@echo "Generating $@"
@$(PYTHON) $(MAKE_PINS) --gen-pin-for $(PIN_PACKAGE_FILE) --save-pins-csv-at $(BOARD_PINS) --save-pins-af-csv-at $(BOARD_AF_PINS)

make_pins: $(GEN_PINS_SRC) $(GEN_PINS_HDR) $(GEN_PINS_QSTR)

$(GEN_PINS_SRC) $(GEN_PINS_HDR) $(GEN_PINS_QSTR): $(BOARD_PINS) $(BOARD_AF_PINS) $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
$(ECHO) "GEN $@"
$(Q) $(PYTHON) $(MAKE_PINS) --prefix $(PREFIX_FILE) --board $(BOARD_PINS) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) > $(GEN_PINS_SRC)

$(HEADER_BUILD):
mkdir -p $(HEADER_BUILD)

#make_pins:
# $(info )
# $(info Executing make-pins.py to generate pin structure automatically)
# $(Q)$(PYTHON) $(MAKE_PINS) --gen-pin-for cyhal_psoc6_02_124_bga.h --save-pins-csv-at pins.csv --save-pins-af-csv-at pins_af.csv --board pins.csv --prefix psoc6_prefix.c --hdr $(BUILD)pins.h > $(GEN_PINS_SRC)

help:
@:
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104 changes: 104 additions & 0 deletions ports/psoc6/boards/CY8CPROTO-062-4343W/pins_af.csv
Original file line number Diff line number Diff line change
@@ -0,0 +1,104 @@
P0_0,0
P0_1,1
P0_2,2
P0_3,3
P0_4,4
P0_5,5
P1_0,8
P1_1,9
P1_2,10
P1_3,11
P1_4,12
P1_5,13
P2_0,16
P2_1,17
P2_2,18
P2_3,19
P2_4,20
P2_5,21
P2_6,22
P2_7,23
P3_0,24
P3_1,25
P3_2,26
P3_3,27
P3_4,28
P3_5,29
P4_0,32
P4_1,33
P5_0,40
P5_1,41
P5_2,42
P5_3,43
P5_4,44
P5_5,45
P5_6,46
P5_7,47
P6_0,48
P6_1,49
P6_2,50
P6_3,51
P6_4,52
P6_5,53
P6_6,54
P6_7,55
P7_0,56
P7_1,57
P7_2,58
P7_3,59
P7_4,60
P7_5,61
P7_6,62
P7_7,63
P8_0,64
P8_1,65
P8_2,66
P8_3,67
P8_4,68
P8_5,69
P8_6,70
P8_7,71
P9_0,72
P9_1,73
P9_2,74
P9_3,75
P9_4,76
P9_5,77
P9_6,78
P9_7,79
P10_0,80
P10_1,81
P10_2,82
P10_3,83
P10_4,84
P10_5,85
P10_6,86
P10_7,87
P11_0,88
P11_1,89
P11_2,90
P11_3,91
P11_4,92
P11_5,93
P11_6,94
P11_7,95
P12_0,96
P12_1,97
P12_2,98
P12_3,99
P12_4,100
P12_5,101
P12_6,102
P12_7,103
P13_0,104
P13_1,105
P13_2,106
P13_3,107
P13_4,108
P13_5,109
P13_6,110
P13_7,111
USBDP,112
P14_0,112
USBDM,113
P14_1,113
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