tests/ports/psoc6: Fix freq. values.

Signed-off-by: NikhitaR-IFX <Nikhita.Rajasekhar@infineon.com>
Infineon · Sep 11, 2024 · f5ef553 · f5ef553
1 parent 720e681
commit f5ef553
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/tests/ports/psoc6/board_only_hw/single/pdm_pcm.py.exp b/tests/ports/psoc6/board_only_hw/single/pdm_pcm.py.exp
@@ -1 +1 @@
-machine.PDM_PCM: PLL0 freq is changed from 24571429 to 24576000. This will affect all resources clock freq sourced by PLL0.
+machine.PDM_PCM: PLL0 freq is changed from 48000000 to 24576000. This will affect all resources clock freq sourced by PLL0.