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Multiboard support changes #103

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Nov 7, 2023
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5ec4745
docs: Added docs and docs conf for PSoC6 port.
jaenrig-ifx Apr 24, 2023
81e5037
docs: Added docs and docs conf for PSoC6 port.
jaenrig-ifx Apr 24, 2023
5ac1041
ports/psoc6: Reworking base MTB example prior externalizing.
jaenrig-ifx Aug 8, 2023
b9c81bf
ports/psoc6: Refactoring MTB dependencies and assets MTB libs.
jaenrig-ifx Aug 9, 2023
cc892d6
ports/psoc6: Refactoring mtb assets and makefile integration.
jaenrig-ifx Aug 11, 2023
e994017
tools/psoc6: Adding dev environment setup support script.
jaenrig-ifx Aug 11, 2023
52c511c
ports/psoc6: Reworked makefile targets, and added help.
jaenrig-ifx Aug 14, 2023
c62256e
tools: Reworking PSoC6 tools based on makefile changes.
jaenrig-ifx Aug 14, 2023
b7b033d
tools/ci.sh: Upgraded MTB docker image psoc6 port.
jaenrig-ifx Aug 14, 2023
72c3c14
ports/psoc6/boards/CY8CPROTO-063-BLE: Adding new board files.
jaenrig-ifx Aug 28, 2023
76dd1c4
ports/psoc6/Makefile: Get board from mtb-lib makefile.
jaenrig-ifx Aug 28, 2023
342b055
ports/psoc6: WIP MTB integration for multi-board-support.
jaenrig-ifx Aug 29, 2023
354fcf8
ports/psoc6: WIP makefile system for multi board support.
jaenrig-ifx Aug 29, 2023
b8ade31
ports/psoc6: WIP rework makefiles for retrieving MTB guild flags.
jaenrig-ifx Aug 30, 2023
080a9bd
ports/psoc6: Added script to retrieve mtb build and link flags.
jaenrig-ifx Aug 30, 2023
8e74af7
ports/psoc6/mtb-libs/mtb_build_info.py: Modified script description.
jaenrig-ifx Aug 30, 2023
bf5d4b3
ports/psoc6: Config modifications for new board SSL inclusion.
jaenrig-ifx Aug 30, 2023
1a3ec50
tools/psoc6: Added support for CY8CPROTO-063-BLE flashing.
jaenrig-ifx Sep 5, 2023
013c95b
ports/psoc6/mtb-libs/makefile_mtb.mk: Added multi bsp program support.
jaenrig-ifx Sep 5, 2023
f9f5edb
tools/psoc6/mpy-psoc.cmd: Fixing board selection validation.
jaenrig-ifx Sep 5, 2023
4059d54
ports/psoc6: Removed psoc6_gpio driver.
jaenrig-ifx Sep 6, 2023
440db2e
ports/psoc6: Removed psoc6_i2c driver.
jaenrig-ifx Sep 7, 2023
2146a1b
ports/psoc6: Removed psoc6_pwm driver.
jaenrig-ifx Sep 7, 2023
5a2e80a
ports/psoc6: Removed psoc6_system driver.
jaenrig-ifx Sep 8, 2023
d5f0f15
.github/workflows/ports_psoc6.yml: Added new board to build stage.
jaenrig-ifx Sep 7, 2023
0f3cf47
tools/psoc6: Added script for device discovery.
jaenrig-ifx Sep 13, 2023
1441a4d
ports/psoc6/mtb-libs/makefile_mtb.mk: Attached devs by py script.
jaenrig-ifx Sep 13, 2023
82e06ee
ports/psoc6: Added attached devices board types board discovery.
jaenrig-ifx Sep 14, 2023
75f13c2
tools/ci.sh: Added devs file arguments to CI.
jaenrig-ifx Sep 14, 2023
dd13938
.github/workflows/ports_psoc6.yml: Adding devs based on runner.
jaenrig-ifx Sep 14, 2023
3008dcb
tools/psoc6: Added boards - serial number map.
jaenrig-ifx Sep 14, 2023
7045822
tools/ci.sh: Bumped psoc6 port ci docker image version.
jaenrig-ifx Sep 14, 2023
70a9eee
tools/psoc6/get-devs.py: Exchanged sn attr prefix removal.
jaenrig-ifx Sep 14, 2023
dc9c860
.github/workflows/ports_psoc6.yml: Fixed path to devs file.
jaenrig-ifx Sep 14, 2023
78c609c
tools: Psoc6 fixing path to devs file.
jaenrig-ifx Sep 14, 2023
8679d43
.github/workflows/ports_psoc6.yml: Added dev selection to tests stages.
jaenrig-ifx Sep 19, 2023
9b4bbb8
tests/psoc6: Added board pin allocation and skip if module unavailable.
jaenrig-ifx Sep 19, 2023
f09676c
tools/psoc6/get-devs.py: Removal unused main section.
jaenrig-ifx Sep 20, 2023
d1cb368
ports/psoc6: WIP Flash memory configuration per board.
jaenrig-ifx Sep 21, 2023
68b1590
ports/psoc6: Adapting deps and config for multi bsp.
jaenrig-ifx Sep 25, 2023
c891299
.github/workflows/ports_psoc6.yml: Added 063-BLE to on-target-test.
jaenrig-ifx Sep 25, 2023
88fe547
ports/psoc6: Removed 063-BLE default disabled config param.
jaenrig-ifx Sep 26, 2023
6df15b7
docs: Added docs and docs conf for PSoC6 port.
jaenrig-ifx Apr 24, 2023
1bb0d05
ports/psoc6: Machine pin class refactor WIP.
jaenrig-ifx Oct 3, 2023
6948653
tests/psoc6/pin.py.exp: Minor chanage in initial pin value.
jaenrig-ifx Oct 3, 2023
1ebfb28
ports/psoc6: Added machine_pin_phy for machine pin resource mgmnt.
jaenrig-ifx Oct 6, 2023
ea57840
tests/psoc6: Changes to adapt psoc6 machine module.
jaenrig-ifx Oct 6, 2023
fb51ea9
ports/psoc6: Fixed typos.
jaenrig-ifx Oct 6, 2023
eadc092
ports/psoc6/machine: Moving pin_phy functions to its module.
jaenrig-ifx Oct 6, 2023
b304ffe
ports/psoc6: Adding deinit to pin and adc machine classes.
jaenrig-ifx Oct 11, 2023
0c1117e
extmod/machine_i2c: Added deinit function to i2c protocol.
jaenrig-ifx Oct 12, 2023
d1358c0
ports/psoc6/../machine_i2c.c: Added deinit and pin phy refactor.
jaenrig-ifx Oct 12, 2023
49f0c83
ports/psoc6/../machine_pwm.c: Added deinit and pin phy refactor.
jaenrig-ifx Oct 12, 2023
d327352
ports/psoc6/../machine_spi.c: Added deinit and pin phy refactor.
jaenrig-ifx Oct 13, 2023
69af53c
tests/psoc6/spi_hard.c: Added pins as args.
jaenrig-ifx Oct 13, 2023
4230cdd
ports/psoc6: Cleanup of previous machine_pin implementation.
jaenrig-ifx Oct 13, 2023
fadbfa2
docs/psoc6: Modificatons in machine module.
jaenrig-ifx Oct 13, 2023
5d5a957
ports/psoc6: Completing make_pins changes.
NikhitaR-IFX Sep 25, 2023
0dca355
ports/psoc6: Moving pin package var to board specifice makefile.
NikhitaR-IFX Sep 26, 2023
7d67d98
ports/psoc6: Integrating pin refactor and make_pins feature.
NikhitaR-IFX Oct 19, 2023
eb45fc8
ports/psoc6: Completed integration of make_pins and pin refactor.
NikhitaR-IFX Oct 20, 2023
ffc6096
ports/psoc6: Refactored make-pins.
NikhitaR-IFX Oct 20, 2023
1eab7c1
ports/psoc6: Removing pins.c.
NikhitaR-IFX Oct 20, 2023
73b40ff
ports/psoc6: Removing commented code.
NikhitaR-IFX Oct 20, 2023
dc30e56
ports/psoc6: Updating pins in adcblock for multiple boards.
NikhitaR-IFX Oct 20, 2023
bdad418
ports/psoc6/machine_pin.c: Fixed on(), off() polarity.
jaenrig-ifx Oct 18, 2023
0aa6ed8
ports/psoc6/pin.py: Modified for new board support.
jaenrig-ifx Oct 18, 2023
cbd9d58
tests/psoc6/dut: Added pin test requiring hw dut connections.
jaenrig-ifx Oct 18, 2023
2792338
tests/psoc6: Modification in test to accept new board.
jaenrig-ifx Oct 18, 2023
1caf2a7
extmod/modmachine.h: Added deinit function to i2s protocol.
jaenrig-ifx Nov 6, 2023
09bf183
ports/psoc6/machine_pwm_c: Merged changes from upstream.
jaenrig-ifx Nov 6, 2023
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20 changes: 14 additions & 6 deletions .github/workflows/ports_psoc6.yml
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,9 @@ jobs:
runs-on: ubuntu-latest
strategy:
matrix:
board: [CY8CPROTO-062-4343W]
board:
- CY8CPROTO-062-4343W
- CY8CPROTO-063-BLE
outputs:
commit_sha: ${{ steps.commit_sha.outputs.sha_short }}

Expand Down Expand Up @@ -48,7 +50,9 @@ jobs:
needs: server-build
strategy:
matrix:
board: [CY8CPROTO-062-4343W]
board:
- CY8CPROTO-062-4343W
- CY8CPROTO-063-BLE
steps:
- uses: actions/checkout@v3
- name: Download binaries
Expand All @@ -60,15 +64,17 @@ jobs:
- name: Setup devices
run: |
cp mpy-psoc6_${{ matrix.board }}_${{ needs.server-build.outputs.commit_sha }}/firmware.hex .
source tools/ci.sh && ci_psoc6_flash_multiple_devices firmware.hex
source tools/ci.sh && ci_psoc6_flash_multiple_devices ${{ matrix.board }} firmware.hex tools/psoc6/${{ runner.name }}-devs.yml
- name: Run psoc6 multi test
run: |
devs=($(python tools/psoc6/get-devs.py port -b ${{ matrix.board }} -y tools/psoc6/${{ runner.name }}-devs.yml))
cd tests
./psoc6/run_psoc6_tests.sh --psoc6-multi
./psoc6/run_psoc6_tests.sh --psoc6-multi --dev0 ${devs[0]} --dev1 ${devs[1]}
- name: Run psoc6 tests
run: |
devs=($(python tools/psoc6/get-devs.py port -b ${{ matrix.board }} -y tools/psoc6/${{ runner.name }}-devs.yml))
cd tests
./psoc6/run_psoc6_tests.sh --psoc6
./psoc6/run_psoc6_tests.sh --psoc6 --dev0 ${devs[0]}
# TODO: Enable when HIL is updgraded
# - name: Run all implemented tests
# if: github.event_name == 'pull_request'
Expand All @@ -86,7 +92,9 @@ jobs:
needs: [server-build, on-target-test]
strategy:
matrix:
board: [CY8CPROTO-062-4343W]
board:
- CY8CPROTO-062-4343W
- CY8CPROTO-063-BLE
if: startsWith(github.ref, 'refs/tags/v') && github.repository_owner == 'infineon'
steps:
- name: Download binaries
Expand Down
60 changes: 30 additions & 30 deletions docs/psoc6/feature_list.rst
Original file line number Diff line number Diff line change
Expand Up @@ -10,25 +10,25 @@ Enabled modules
* cmath
* gc
* math
* uarray
* uasyncio
* ubinascii
* ucollections
* uerrno
* uhashlib
* uheapq
* uio
* ujson
* uos
* urandom
* ure
* uselect
* usocket
* ussl
* ustruct
* usys
* utime
* uzlib
* array
* asyncio
* binascii
* collections
* errno
* hashlib
* heapq
* io
* json
* os
* random
* re
* select
* socket
* ssl
* struct
* sys
* time
* zlib


* Micropython specific modules and libraries
Expand All @@ -46,7 +46,7 @@ Enabled modules
* ADCBlock

* micropython
* ucryptolib
* cryptolib
* uctypes
* network

Expand All @@ -62,7 +62,7 @@ Not yet enabled

* Micropython specific modules and libraries
* btree
* ubluetooth
* bluetooth


Table :ref:`configuration details <table_mpy_configuration>` below lists specific settings deviating from the configuration as per config level as well as functionality not yet implemented:
Expand All @@ -74,29 +74,29 @@ Table :ref:`configuration details <table_mpy_configuration>` below lists specifi
+=================+======================================================================================================================+
| gc | Option ``MICROPY_ENABLE_GC`` enabled. |
+-----------------+----------------------------------------------------------------------------------------------------------------------+
| uhashlib | Options ``MICROPY_PY_UHASHLIB_MD5``, ``MICROPY_PY_UHASHLIB_SHA1``, ``MICROPY_PY_UHASHLIB_SHA256`` enabled. |
| hashlib | Options ``MICROPY_PY_UHASHLIB_MD5``, ``MICROPY_PY_UHASHLIB_SHA1``, ``MICROPY_PY_UHASHLIB_SHA256`` enabled. |
+-----------------+----------------------------------------------------------------------------------------------------------------------+
| uos | Support for LFS2 and FAT, LFS2 enabled by default. FS mounted on external flash at "/flash". |
| os | Support for LFS2 and FAT, LFS2 enabled by default. FS mounted on external flash at "/flash". |
| | |
| | Options ``MICROPY_PY_OS_DUPTERM``, ``MICROPY_PY_UOS_GETENV_PUTENV_UNSETENV``, ``MICROPY_PY_UOS_INCLUDEFILE``, |
| | ``MICROPY_PY_UOS_SYSTEM``, ``MICROPY_PY_UOS_UNAME``, ``MICROPY_VFS_LFS2`` enabled. |
| | |
| | Function *urandom()* not yet implemented. Requires implementing *mp_uos_urandom()* and setting option |
| | ``MICROPY_PY_UOS_URANDOM``. |
+-----------------+----------------------------------------------------------------------------------------------------------------------+
| urandom | Function *seed()* not yet implemented. |
| random | Function *seed()* not yet implemented. |
+-----------------+----------------------------------------------------------------------------------------------------------------------+
| ure | Options ``MICROPY_PY_URE_DEBUG``, ``MICROPY_PY_URE_MATCH_GROUPS``, ``MICROPY_PY_URE_MATCH_SPAN_START_END`` enabled. |
| re | Options ``MICROPY_PY_URE_DEBUG``, ``MICROPY_PY_URE_MATCH_GROUPS``, ``MICROPY_PY_URE_MATCH_SPAN_START_END`` enabled. |
+-----------------+----------------------------------------------------------------------------------------------------------------------+
| usocket | Options ``MICROPY_PY_USOCKET`` enabled. |
| socket | Options ``MICROPY_PY_USOCKET`` enabled. |
+-----------------+----------------------------------------------------------------------------------------------------------------------+
| ussl | Options ``MICROPY_PY_USSL`` enabled. Has 2 failing tests. |
| ssl | Options ``MICROPY_PY_USSL`` enabled. Has 2 failing tests. |
+-----------------+----------------------------------------------------------------------------------------------------------------------+
| usys | Options ``MICROPY_PY_SYS_EXC_INFO`` enabled. |
| sys | Options ``MICROPY_PY_SYS_EXC_INFO`` enabled. |
+-----------------+----------------------------------------------------------------------------------------------------------------------+
| utime | Enabled through HAL functions based on machine.RTC module. Option ``MICROPY_PY_UTIME_MP_HAL`` enabled. |
| time | Enabled through HAL functions based on machine.RTC module. Option ``MICROPY_PY_UTIME_MP_HAL`` enabled. |
+-----------------+----------------------------------------------------------------------------------------------------------------------+
| ucryptolib | Options ``MICROPY_PY_UCRYPTOLIB``, ``MICROPY_PY_UCRYPTOLIB_CTR``, ``MICROPY_PY_UCRYPTOLIB_CONSTS`` enabled. |
| cryptolib | Options ``MICROPY_PY_UCRYPTOLIB``, ``MICROPY_PY_UCRYPTOLIB_CTR``, ``MICROPY_PY_UCRYPTOLIB_CONSTS`` enabled. |
+-----------------+----------------------------------------------------------------------------------------------------------------------+
| machine | Functions not yet implemented: *lightsleep()*, *deepsleep()*, *wake_reason()*, *time_pulse_us()*, *rng()*. |
| | |
Expand Down
82 changes: 51 additions & 31 deletions docs/psoc6/quickref.rst
Original file line number Diff line number Diff line change
Expand Up @@ -87,9 +87,9 @@ An instance of the :mod:`machine.Pin` class can be created by invoking the const

from machine import Pin

p0 = Pin('P13_7', Pin.OUT, Pin.PULL_DOWN, value=Pin.STATE_LOW) # create output pin on pin P13_7,
# with pull-down resistor enabled,
# with initial value 0 (STATE_LOW)
p0 = Pin('P13_7', Pin.OUT, Pin.PULL_DOWN, value=0) # create output pin on pin P13_7,
# with pull-down resistor enabled,
# with initial value 0 (low)


Additionally, with any combination of parameters (except the Pin number or ``id`` which should be passed mandatorily), a :mod:`machine.Pin` object with various configuration levels can be instantiated. In these cases, the :meth:`Pin.init` function has to be called proactively to set the other necessary configurations, as needed.
Expand All @@ -115,19 +115,22 @@ Similar to CPython, the parameters can be passed in any order if keywords are us

from machine import Pin

p0 = Pin(id='P13_7', value=Pin.STATE_LOW, pull=Pin.PULL_DOWN, mode=Pin.OUT) # create output pin on pin P13_7,
# with pull-down resistor enabled,
# with initial value 0 (STATE_LOW)
p0 = Pin(id='P13_7', value=0, pull=Pin.PULL_DOWN, mode=Pin.OUT) # create output pin on pin P13_7,
# with pull-down resistor enabled,
# with initial value 0 (low)


p1 = Pin('P0_0', Pin.OUT, None, value=Pin.STATE_HIGH) # create output pin on pin P0_0,
# with pull as NONE,
# with initial value 1 (STATE_HIGH)
p1 = Pin('P0_0', Pin.OUT, None, value=1) # create output pin on pin P0_0,
# with pull as NONE,
# with initial value 1 (high)

Note that the parameters such as ``value`` can only be passed as keyword arguments.

..
TODO: add ``drive`` and ``alt`` when implemented
.. note::

The following constructor arguments are NOT supported in this port:
* ``drive``. This configuration is automatically handled by the constructor and abstracted to the user.
* ``alt``. Alternative functionality is directly handled by the respective machine peripherals classes.

Methods
^^^^^^^
Expand All @@ -137,15 +140,6 @@ Methods
Set pin value to its complement.


Constants
^^^^^^^^^
The following constants are used to configure the pin objects in addition to the ones mentioned in the :mod:`machine.Pin` class.

.. data:: Pin.STATE_LOW
Pin.STATE_HIGH

Selects the pin value.

There's a higher-level abstraction :ref:`machine.Signal <machine.Signal>`
which can be used to invert a pin. Useful for illuminating active-low LEDs
using ``on()`` or ``value(1)``.
Expand Down Expand Up @@ -179,6 +173,14 @@ scl P6_0 P9_0
sda P6_1 P9_1
===== =========== ============

..

TODO: This is only applicable to the CY8CPROTO-062-4343W. This does not belong here.
TODO: Define approach on how the user gets to know the pinout diagram, alternate function of each board
- From board manual?
- From datasheet?
- To create a pinout diagram?


The driver is accessed via :ref:`machine.I2C <machine.I2C>`

Expand All @@ -191,19 +193,19 @@ initialized and configured to work in master mode. The maximum supported frequen
::

from machine import I2C
i2c = I2C(0,scl='P6_0',sda='P6_1',freq=400000)
i2c = I2C(0, scl='P6_0', sda='P6_1',freq=400000)

Here, ``id=0`` should be passed mandatorily which selects the ``master`` mode operation.
Here, ``id=0`` should be passed mandatorily which selects the ``master`` mode operation. The ``scl`` and ``sda`` pins are also required.

::

from machine import I2C
i2c = I2C(0) #I2C is initialized & configured with default scl, sda pin & frequency
i2c = I2C(0, scl='P6_0', sda='P6_1') #I2C is initialized & configured with default frequency

::

from machine import I2C
i2c = I2C(0,scl='P9_0',sda='P9_1',freq=400000) #I2C is initialised & configured with given scl,sda pins & frequency
i2c = I2C(0, scl='P9_0', sda='P9_1', freq=400000) #I2C is initialised & configured with given scl,sda pins & frequency

Methods
^^^^^^^
Expand Down Expand Up @@ -299,6 +301,7 @@ Security modes constants:
.. note::
Power modes configuration not implemented.


Here is a function you can run (or put in your boot.py file) to automatically connect to your WiFi network:

::
Expand Down Expand Up @@ -409,8 +412,17 @@ MISO P9_1 P6_1 P10_1
SCK P9_2 P6_2 P10_2
===== =========== ============ ============

..

TODO: This is only applicable to the CY8CPROTO-062-4343W. This does not belong here.
TODO: Define approach on how the user gets to know the pinout diagram, alternate function of each board
- From board manual?
- From datasheet?
- To create a pinout diagram?

Refer `PSoC 6 MCU: CY8C62x8, CY8C62xA Datasheet <https://www.infineon.com/dgdl/Infineon-PSOC_6_MCU_CY8C62X8_CY8C62XA-DataSheet-v18_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee7d03a70b1>`_
for additional details regarding all the SPI capable pins.
for additional details regarding all the SPI capable pins. The pins ``sck``, ``mosi`` and ``miso`` *must* be specified when
initialising Software SPI.

The driver is accessed via :ref:`machine.SPI <machine.SPI>`

Expand All @@ -423,7 +435,7 @@ SPI object is created with default settings or settings of previous initializati
::

from machine import SPI
spi = SPI(0) # Default assignment: id=0, sck=P9_2 ,MOSI=P9_0, MISO=P9_1, baudrate=1000000, Polarity=0, Phase=0, bits=8, firstbit=SPI.MSB
spi = SPI(0, sck='P11_2', mosi='P11_0', miso='P11_1') # Default assignment: id=0, SCK=P11_2 ,MOSI=P11_0, MISO=P11_1
spi.init()

Management of a CS signal should happen in user code (via machine.Pin class).
Expand All @@ -439,7 +451,7 @@ If the constructor is called with any additional parameters then SPI object is c

::

spi = SPI(0, baudrate=2000000) #object is created & initialised with baudrate=2000000 & default parameters
spi = SPI(0, sck='P11_2', mosi='P11_0', miso='P11_1', baudrate=2000000) #object is created & initialised with baudrate=2000000 & default parameters
spi = SPI(0, baudrate=1500000, polarity=1, phase=1, bits=8, firstbit=SPI.LSB, sck='P11_2', mosi='P11_0', miso='P11_1')

Methods
Expand Down Expand Up @@ -471,9 +483,9 @@ following pins : "P10_0" - "P10_5".

Use the :ref:`machine.ADC <machine.ADC>` class::

from machine import ADC, Pin
from machine import ADC

adc = ADC(Pin("P10_0")) # create an ADC object on ADC pin
adc = ADC("P10_0") # create an ADC object on ADC pin
val = adc.read_u16() # read a raw analog value in the range 0-65535
val = adc.read_uv() # read an analog value in micro volts

Expand All @@ -497,16 +509,24 @@ PSoC6 supports only 1 12-bit SAR ADC with the following channel to pin mapping a
| 5 | P10_5 |
+---------+-------+

..

TODO: This is only applicable to the CY8CPROTO-062-4343W. This does not belong here.
TODO: Define approach on how the user gets to know the pinout diagram, alternate function of each board
- From board manual?
- From datasheet?
- To create a pinout diagram?

.. note::
Arbitrary connection of ADC channels to GPIO is not supported. Specifying a pin that is not connected to this block,
or specifying a mismatched channel and pin, will raise an exception.

To use the APIs:
::

from machine import ADCBlock, Pin
from machine import ADCBlock

adcBlock = ADCBlock(0, bits=12) # create an ADCBlock 0 object
adc = adcBlock.connect(0, Pin("P10_0")) # connect channel 0 to pin P10_0
adc = adcBlock.connect(0, "P10_0") # connect channel 0 to pin P10_0
val = adc.read_uv() # read an analog value in micro volts

12 changes: 12 additions & 0 deletions extmod/machine_i2c.c
Original file line number Diff line number Diff line change
Expand Up @@ -319,6 +319,17 @@ STATIC mp_obj_t machine_i2c_init(size_t n_args, const mp_obj_t *args, mp_map_t *
}
MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2c_init_obj, 1, machine_i2c_init);

STATIC mp_obj_t machine_i2c_deinit(mp_obj_t self_in) {
mp_obj_base_t *self = MP_OBJ_TO_PTR(self_in);
mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t *)MP_OBJ_TYPE_GET_SLOT(self->type, protocol);
if (i2c_p->deinit == NULL) {
mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("I2C operation not supported"));
}
i2c_p->deinit(self);
return mp_const_none;
}
MP_DEFINE_CONST_FUN_OBJ_1(machine_i2c_deinit_obj, machine_i2c_deinit);

STATIC mp_obj_t machine_i2c_scan(mp_obj_t self_in) {
mp_obj_base_t *self = MP_OBJ_TO_PTR(self_in);
mp_obj_t list = mp_obj_new_list(0, NULL);
Expand Down Expand Up @@ -632,6 +643,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2c_writeto_mem_obj, 1, machine_i2c_wr

STATIC const mp_rom_map_elem_t machine_i2c_locals_dict_table[] = {
{ MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_i2c_init_obj) },
{ MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_i2c_deinit_obj) },
{ MP_ROM_QSTR(MP_QSTR_scan), MP_ROM_PTR(&machine_i2c_scan_obj) },

// primitive I2C operations
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