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Feature coverage per architecture

Karol Stasiak edited this page Mar 2, 2021 · 34 revisions

The following table shows which features are implemented for which CPU architecture.

feature 6502 65816 Z80 8080 LR35902 8086 6809
*, *= ✔️ ✔️ ✔️ ✔️ ✔️ 🐌 ✔️
signed comparisons ✔️ ✔️ ✔️ ✔️ ✔️ 🐌 ✔️
stack variables ✔️ ✔️ ✔️ 🐌 🐌 ✔️ ✔️
assembly ✳️2 🚧3 ✔️ ✔️ ✔️ ✔️
other features ✔️ 🐌 ✔️ ✔️ ✔️ 🚧 ✔️
optimization ✔️ 🚧4 ✔️ 🚧5 🚧5 ✔️
assembly syntax colouring ✔️ 🚧4
Legend:

✔️ – implemented
📺 – implemented only for subarchitectures that support it natively
🐌 – implemented, but suboptimal
✳️ – implemented fully for the base architecture, but partially for extensions
🚧 – partially implemented
⚠️ – implemented, but incorrectly
❌ – not implemented yet

Notes:
  1. No hardware support.

  2. All 6502, 65SC02 and 65CE02 instructions are supported. 65C02 bit setting/testing instructions and some HuC6280 instructions are not supported.

  3. Some instructions and addressing modes are not supported.

  4. Optimized for the processor in the emulation mode used as an accelerator for a 6502-based system. Doesn't utilize its full capabilities in the native mode.

  5. Major missing optimization is elision of stack variables.

Further remarks

  • Implemented features may require a zeropage register on 6502 targets.

  • 65816 code is quite suboptimal. If you're targeting a 65816 machine only, consider using something else for the time being.

  • 8086 code is simply a dumb translation from 8080 and is therefore very, very suboptimal. If you're targeting a 8086 machine only, consider using something else for the time being.

  • Other CPU's from the 6809 family might be added in the future.

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