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@bwlodarcz
bwlodarcz committed Nov 9, 2023
1 parent 8abf07c commit a89ef46
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Showing 10 changed files with 2,903 additions and 206 deletions.
49 changes: 43 additions & 6 deletions lib/SPIRV/SPIRVWriter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4038,7 +4038,7 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
Op = OpBitwiseAnd;
} else if (IID == Intrinsic::vector_reduce_or) {
Op = OpBitwiseOr;
} else if (IID == Intrinsic::vector_reduce_xor) {
} else {
Op = OpBitwiseXor;
}
VectorType *VT = cast<VectorType>(II->getArgOperand(0)->getType());
Expand Down Expand Up @@ -4066,11 +4066,48 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
}
return Extracts[0];
}
// case Intrinsic::vector_reduce_smax:
// case Intrinsic::vector_reduce_smin:
// case Intrinsic::vector_reduce_umax:
// case Intrinsic::vector_reduce_umin: {
// }
case Intrinsic::vector_reduce_smax:
case Intrinsic::vector_reduce_smin:
case Intrinsic::vector_reduce_umax:
case Intrinsic::vector_reduce_umin: {
Op Op;
if (IID == Intrinsic::vector_reduce_smax) {
Op = OpSGreaterThan;
} else if (IID == Intrinsic::vector_reduce_smin) {
Op = OpSLessThan;
} else if (IID == Intrinsic::vector_reduce_umax) {
Op = OpUGreaterThan;
} else {
Op = OpULessThan;
}
VectorType *VT = cast<VectorType>(II->getArgOperand(0)->getType());
SPIRVValue *SV = transValue(II->getArgOperand(0), BB);
SPIRVType *B = transType(Type::getInt1Ty(II->getContext()));
SPIRVTypeInt *I32 = BM->addIntegerType(32);
unsigned ArrSize = VT->getElementCount().getFixedValue();
SmallVector<SPIRVValue *, 16> Extracts(ArrSize);
for (unsigned Idx = 0; Idx < ArrSize; ++Idx) {
Extracts[Idx] = BM->addVectorExtractDynamicInst(
SV, BM->addIntegerConstant(I32, Idx), BB);
}
unsigned Counter = ArrSize >> 1;
while (Counter != 0) {
for (unsigned Idx = 0; Idx < Counter; ++Idx) {
SPIRVValue *Cond = BM->addBinaryInst(Op, B, Extracts[Idx << 1],
Extracts[(Idx << 1) + 1], BB);
Extracts[Idx] = BM->addSelectInst(Cond, Extracts[Idx << 1],
Extracts[(Idx << 1) + 1], BB);
}
Counter >>= 1;
}
if ((ArrSize & 1) != 0) {
SPIRVValue *Cond =
BM->addBinaryInst(Op, B, Extracts[0], Extracts[ArrSize - 1], BB);
Extracts[0] =
BM->addSelectInst(Cond, Extracts[0], Extracts[ArrSize - 1], BB);
}
return Extracts[0];
}
case Intrinsic::memset: {
// Generally there is no direct mapping of memset to SPIR-V. But it turns
// out that memset is emitted by Clang for initialization in default
Expand Down
80 changes: 40 additions & 40 deletions test/llvm-intrinsics/llvm-vector-reduce/add.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -5,46 +5,46 @@

target triple = "spir64-unknown-unknown"

; CHECK-SPIRV: TypeInt [[#I8TYPE:]] 8
; CHECK-SPIRV: TypeInt [[#I32TYPE:]] 32
; CHECK-SPIRV: TypeInt [[#I16TYPE:]] 16
; CHECK-SPIRV: TypeInt [[#I64TYPE:]] 64
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_0:]] 0
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_1:]] 1
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_2:]] 2
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_3:]] 3
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_4:]] 4
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_5:]] 5
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_6:]] 6
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_7:]] 7
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_8:]] 8
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_9:]] 9
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_10:]] 10
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_11:]] 11
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_12:]] 12
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_13:]] 13
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_14:]] 14
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_15:]] 15
; CHECK-SPIRV: TypeVector [[#V2XI8TYPE:]] [[#I8TYPE]] 2
; CHECK-SPIRV: TypeVector [[#V3XI8TYPE:]] [[#I8TYPE]] 3
; CHECK-SPIRV: TypeVector [[#V4XI8TYPE:]] [[#I8TYPE]] 4
; CHECK-SPIRV: TypeVector [[#V8XI8TYPE:]] [[#I8TYPE]] 8
; CHECK-SPIRV: TypeVector [[#V16XI8TYPE:]] [[#I8TYPE]] 16
; CHECK-SPIRV: TypeVector [[#V2XI16TYPE:]] [[#I16TYPE]] 2
; CHECK-SPIRV: TypeVector [[#V3XI16TYPE:]] [[#I16TYPE]] 3
; CHECK-SPIRV: TypeVector [[#V4XI16TYPE:]] [[#I16TYPE]] 4
; CHECK-SPIRV: TypeVector [[#V8XI16TYPE:]] [[#I16TYPE]] 8
; CHECK-SPIRV: TypeVector [[#V16XI16TYPE:]] [[#I16TYPE]] 16
; CHECK-SPIRV: TypeVector [[#V2XI32TYPE:]] [[#I32TYPE]] 2
; CHECK-SPIRV: TypeVector [[#V3XI32TYPE:]] [[#I32TYPE]] 3
; CHECK-SPIRV: TypeVector [[#V4XI32TYPE:]] [[#I32TYPE]] 4
; CHECK-SPIRV: TypeVector [[#V8XI32TYPE:]] [[#I32TYPE]] 8
; CHECK-SPIRV: TypeVector [[#V16XI32TYPE:]] [[#I32TYPE]] 16
; CHECK-SPIRV: TypeVector [[#V2XI64TYPE:]] [[#I64TYPE]] 2
; CHECK-SPIRV: TypeVector [[#V3XI64TYPE:]] [[#I64TYPE]] 3
; CHECK-SPIRV: TypeVector [[#V4XI64TYPE:]] [[#I64TYPE]] 4
; CHECK-SPIRV: TypeVector [[#V8XI64TYPE:]] [[#I64TYPE]] 8
; CHECK-SPIRV: TypeVector [[#V16XI64TYPE:]] [[#I64TYPE]] 16
; CHECK-SPIRV-DAG: TypeInt [[#I8TYPE:]] 8
; CHECK-SPIRV-DAG: TypeInt [[#I32TYPE:]] 32
; CHECK-SPIRV-DAG: TypeInt [[#I16TYPE:]] 16
; CHECK-SPIRV-DAG: TypeInt [[#I64TYPE:]] 64
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_0:]] 0
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_1:]] 1
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_2:]] 2
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_3:]] 3
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_4:]] 4
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_5:]] 5
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_6:]] 6
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_7:]] 7
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_8:]] 8
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_9:]] 9
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_10:]] 10
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_11:]] 11
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_12:]] 12
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_13:]] 13
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_14:]] 14
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_15:]] 15
; CHECK-SPIRV-DAG: TypeVector [[#V2XI8TYPE:]] [[#I8TYPE]] 2
; CHECK-SPIRV-DAG: TypeVector [[#V3XI8TYPE:]] [[#I8TYPE]] 3
; CHECK-SPIRV-DAG: TypeVector [[#V4XI8TYPE:]] [[#I8TYPE]] 4
; CHECK-SPIRV-DAG: TypeVector [[#V8XI8TYPE:]] [[#I8TYPE]] 8
; CHECK-SPIRV-DAG: TypeVector [[#V16XI8TYPE:]] [[#I8TYPE]] 16
; CHECK-SPIRV-DAG: TypeVector [[#V2XI16TYPE:]] [[#I16TYPE]] 2
; CHECK-SPIRV-DAG: TypeVector [[#V3XI16TYPE:]] [[#I16TYPE]] 3
; CHECK-SPIRV-DAG: TypeVector [[#V4XI16TYPE:]] [[#I16TYPE]] 4
; CHECK-SPIRV-DAG: TypeVector [[#V8XI16TYPE:]] [[#I16TYPE]] 8
; CHECK-SPIRV-DAG: TypeVector [[#V16XI16TYPE:]] [[#I16TYPE]] 16
; CHECK-SPIRV-DAG: TypeVector [[#V2XI32TYPE:]] [[#I32TYPE]] 2
; CHECK-SPIRV-DAG: TypeVector [[#V3XI32TYPE:]] [[#I32TYPE]] 3
; CHECK-SPIRV-DAG: TypeVector [[#V4XI32TYPE:]] [[#I32TYPE]] 4
; CHECK-SPIRV-DAG: TypeVector [[#V8XI32TYPE:]] [[#I32TYPE]] 8
; CHECK-SPIRV-DAG: TypeVector [[#V16XI32TYPE:]] [[#I32TYPE]] 16
; CHECK-SPIRV-DAG: TypeVector [[#V2XI64TYPE:]] [[#I64TYPE]] 2
; CHECK-SPIRV-DAG: TypeVector [[#V3XI64TYPE:]] [[#I64TYPE]] 3
; CHECK-SPIRV-DAG: TypeVector [[#V4XI64TYPE:]] [[#I64TYPE]] 4
; CHECK-SPIRV-DAG: TypeVector [[#V8XI64TYPE:]] [[#I64TYPE]] 8
; CHECK-SPIRV-DAG: TypeVector [[#V16XI64TYPE:]] [[#I64TYPE]] 16

; -------- I8 --------

Expand Down
80 changes: 40 additions & 40 deletions test/llvm-intrinsics/llvm-vector-reduce/and.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -5,46 +5,46 @@

target triple = "spir64-unknown-unknown"

; CHECK-SPIRV: TypeInt [[#I8TYPE:]] 8
; CHECK-SPIRV: TypeInt [[#I32TYPE:]] 32
; CHECK-SPIRV: TypeInt [[#I16TYPE:]] 16
; CHECK-SPIRV: TypeInt [[#I64TYPE:]] 64
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_0:]] 0
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_1:]] 1
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_2:]] 2
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_3:]] 3
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_4:]] 4
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_5:]] 5
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_6:]] 6
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_7:]] 7
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_8:]] 8
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_9:]] 9
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_10:]] 10
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_11:]] 11
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_12:]] 12
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_13:]] 13
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_14:]] 14
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_15:]] 15
; CHECK-SPIRV: TypeVector [[#V2XI8TYPE:]] [[#I8TYPE]] 2
; CHECK-SPIRV: TypeVector [[#V3XI8TYPE:]] [[#I8TYPE]] 3
; CHECK-SPIRV: TypeVector [[#V4XI8TYPE:]] [[#I8TYPE]] 4
; CHECK-SPIRV: TypeVector [[#V8XI8TYPE:]] [[#I8TYPE]] 8
; CHECK-SPIRV: TypeVector [[#V16XI8TYPE:]] [[#I8TYPE]] 16
; CHECK-SPIRV: TypeVector [[#V2XI16TYPE:]] [[#I16TYPE]] 2
; CHECK-SPIRV: TypeVector [[#V3XI16TYPE:]] [[#I16TYPE]] 3
; CHECK-SPIRV: TypeVector [[#V4XI16TYPE:]] [[#I16TYPE]] 4
; CHECK-SPIRV: TypeVector [[#V8XI16TYPE:]] [[#I16TYPE]] 8
; CHECK-SPIRV: TypeVector [[#V16XI16TYPE:]] [[#I16TYPE]] 16
; CHECK-SPIRV: TypeVector [[#V2XI32TYPE:]] [[#I32TYPE]] 2
; CHECK-SPIRV: TypeVector [[#V3XI32TYPE:]] [[#I32TYPE]] 3
; CHECK-SPIRV: TypeVector [[#V4XI32TYPE:]] [[#I32TYPE]] 4
; CHECK-SPIRV: TypeVector [[#V8XI32TYPE:]] [[#I32TYPE]] 8
; CHECK-SPIRV: TypeVector [[#V16XI32TYPE:]] [[#I32TYPE]] 16
; CHECK-SPIRV: TypeVector [[#V2XI64TYPE:]] [[#I64TYPE]] 2
; CHECK-SPIRV: TypeVector [[#V3XI64TYPE:]] [[#I64TYPE]] 3
; CHECK-SPIRV: TypeVector [[#V4XI64TYPE:]] [[#I64TYPE]] 4
; CHECK-SPIRV: TypeVector [[#V8XI64TYPE:]] [[#I64TYPE]] 8
; CHECK-SPIRV: TypeVector [[#V16XI64TYPE:]] [[#I64TYPE]] 16
; CHECK-SPIRV-DAG: TypeInt [[#I8TYPE:]] 8
; CHECK-SPIRV-DAG: TypeInt [[#I32TYPE:]] 32
; CHECK-SPIRV-DAG: TypeInt [[#I16TYPE:]] 16
; CHECK-SPIRV-DAG: TypeInt [[#I64TYPE:]] 64
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_0:]] 0
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_1:]] 1
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_2:]] 2
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_3:]] 3
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_4:]] 4
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_5:]] 5
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_6:]] 6
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_7:]] 7
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_8:]] 8
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_9:]] 9
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_10:]] 10
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_11:]] 11
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_12:]] 12
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_13:]] 13
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_14:]] 14
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_15:]] 15
; CHECK-SPIRV-DAG: TypeVector [[#V2XI8TYPE:]] [[#I8TYPE]] 2
; CHECK-SPIRV-DAG: TypeVector [[#V3XI8TYPE:]] [[#I8TYPE]] 3
; CHECK-SPIRV-DAG: TypeVector [[#V4XI8TYPE:]] [[#I8TYPE]] 4
; CHECK-SPIRV-DAG: TypeVector [[#V8XI8TYPE:]] [[#I8TYPE]] 8
; CHECK-SPIRV-DAG: TypeVector [[#V16XI8TYPE:]] [[#I8TYPE]] 16
; CHECK-SPIRV-DAG: TypeVector [[#V2XI16TYPE:]] [[#I16TYPE]] 2
; CHECK-SPIRV-DAG: TypeVector [[#V3XI16TYPE:]] [[#I16TYPE]] 3
; CHECK-SPIRV-DAG: TypeVector [[#V4XI16TYPE:]] [[#I16TYPE]] 4
; CHECK-SPIRV-DAG: TypeVector [[#V8XI16TYPE:]] [[#I16TYPE]] 8
; CHECK-SPIRV-DAG: TypeVector [[#V16XI16TYPE:]] [[#I16TYPE]] 16
; CHECK-SPIRV-DAG: TypeVector [[#V2XI32TYPE:]] [[#I32TYPE]] 2
; CHECK-SPIRV-DAG: TypeVector [[#V3XI32TYPE:]] [[#I32TYPE]] 3
; CHECK-SPIRV-DAG: TypeVector [[#V4XI32TYPE:]] [[#I32TYPE]] 4
; CHECK-SPIRV-DAG: TypeVector [[#V8XI32TYPE:]] [[#I32TYPE]] 8
; CHECK-SPIRV-DAG: TypeVector [[#V16XI32TYPE:]] [[#I32TYPE]] 16
; CHECK-SPIRV-DAG: TypeVector [[#V2XI64TYPE:]] [[#I64TYPE]] 2
; CHECK-SPIRV-DAG: TypeVector [[#V3XI64TYPE:]] [[#I64TYPE]] 3
; CHECK-SPIRV-DAG: TypeVector [[#V4XI64TYPE:]] [[#I64TYPE]] 4
; CHECK-SPIRV-DAG: TypeVector [[#V8XI64TYPE:]] [[#I64TYPE]] 8
; CHECK-SPIRV-DAG: TypeVector [[#V16XI64TYPE:]] [[#I64TYPE]] 16

; -------- I8 --------

Expand Down
80 changes: 40 additions & 40 deletions test/llvm-intrinsics/llvm-vector-reduce/mul.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5,46 +5,46 @@

target triple = "spir64-unknown-unknown"

; CHECK-SPIRV: TypeInt [[#I8TYPE:]] 8
; CHECK-SPIRV: TypeInt [[#I32TYPE:]] 32
; CHECK-SPIRV: TypeInt [[#I16TYPE:]] 16
; CHECK-SPIRV: TypeInt [[#I64TYPE:]] 64
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_0:]] 0
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_1:]] 1
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_2:]] 2
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_3:]] 3
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_4:]] 4
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_5:]] 5
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_6:]] 6
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_7:]] 7
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_8:]] 8
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_9:]] 9
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_10:]] 10
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_11:]] 11
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_12:]] 12
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_13:]] 13
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_14:]] 14
; CHECK-SPIRV: Constant [[#I32TYPE]] [[#CONST_15:]] 15
; CHECK-SPIRV: TypeVector [[#V2XI8TYPE:]] [[#I8TYPE]] 2
; CHECK-SPIRV: TypeVector [[#V3XI8TYPE:]] [[#I8TYPE]] 3
; CHECK-SPIRV: TypeVector [[#V4XI8TYPE:]] [[#I8TYPE]] 4
; CHECK-SPIRV: TypeVector [[#V8XI8TYPE:]] [[#I8TYPE]] 8
; CHECK-SPIRV: TypeVector [[#V16XI8TYPE:]] [[#I8TYPE]] 16
; CHECK-SPIRV: TypeVector [[#V2XI16TYPE:]] [[#I16TYPE]] 2
; CHECK-SPIRV: TypeVector [[#V3XI16TYPE:]] [[#I16TYPE]] 3
; CHECK-SPIRV: TypeVector [[#V4XI16TYPE:]] [[#I16TYPE]] 4
; CHECK-SPIRV: TypeVector [[#V8XI16TYPE:]] [[#I16TYPE]] 8
; CHECK-SPIRV: TypeVector [[#V16XI16TYPE:]] [[#I16TYPE]] 16
; CHECK-SPIRV: TypeVector [[#V2XI32TYPE:]] [[#I32TYPE]] 2
; CHECK-SPIRV: TypeVector [[#V3XI32TYPE:]] [[#I32TYPE]] 3
; CHECK-SPIRV: TypeVector [[#V4XI32TYPE:]] [[#I32TYPE]] 4
; CHECK-SPIRV: TypeVector [[#V8XI32TYPE:]] [[#I32TYPE]] 8
; CHECK-SPIRV: TypeVector [[#V16XI32TYPE:]] [[#I32TYPE]] 16
; CHECK-SPIRV: TypeVector [[#V2XI64TYPE:]] [[#I64TYPE]] 2
; CHECK-SPIRV: TypeVector [[#V3XI64TYPE:]] [[#I64TYPE]] 3
; CHECK-SPIRV: TypeVector [[#V4XI64TYPE:]] [[#I64TYPE]] 4
; CHECK-SPIRV: TypeVector [[#V8XI64TYPE:]] [[#I64TYPE]] 8
; CHECK-SPIRV: TypeVector [[#V16XI64TYPE:]] [[#I64TYPE]] 16
; CHECK-SPIRV-DAG: TypeInt [[#I8TYPE:]] 8
; CHECK-SPIRV-DAG: TypeInt [[#I32TYPE:]] 32
; CHECK-SPIRV-DAG: TypeInt [[#I16TYPE:]] 16
; CHECK-SPIRV-DAG: TypeInt [[#I64TYPE:]] 64
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_0:]] 0
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_1:]] 1
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_2:]] 2
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_3:]] 3
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_4:]] 4
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_5:]] 5
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_6:]] 6
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_7:]] 7
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_8:]] 8
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_9:]] 9
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_10:]] 10
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_11:]] 11
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_12:]] 12
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_13:]] 13
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_14:]] 14
; CHECK-SPIRV-DAG: Constant [[#I32TYPE]] [[#CONST_15:]] 15
; CHECK-SPIRV-DAG: TypeVector [[#V2XI8TYPE:]] [[#I8TYPE]] 2
; CHECK-SPIRV-DAG: TypeVector [[#V3XI8TYPE:]] [[#I8TYPE]] 3
; CHECK-SPIRV-DAG: TypeVector [[#V4XI8TYPE:]] [[#I8TYPE]] 4
; CHECK-SPIRV-DAG: TypeVector [[#V8XI8TYPE:]] [[#I8TYPE]] 8
; CHECK-SPIRV-DAG: TypeVector [[#V16XI8TYPE:]] [[#I8TYPE]] 16
; CHECK-SPIRV-DAG: TypeVector [[#V2XI16TYPE:]] [[#I16TYPE]] 2
; CHECK-SPIRV-DAG: TypeVector [[#V3XI16TYPE:]] [[#I16TYPE]] 3
; CHECK-SPIRV-DAG: TypeVector [[#V4XI16TYPE:]] [[#I16TYPE]] 4
; CHECK-SPIRV-DAG: TypeVector [[#V8XI16TYPE:]] [[#I16TYPE]] 8
; CHECK-SPIRV-DAG: TypeVector [[#V16XI16TYPE:]] [[#I16TYPE]] 16
; CHECK-SPIRV-DAG: TypeVector [[#V2XI32TYPE:]] [[#I32TYPE]] 2
; CHECK-SPIRV-DAG: TypeVector [[#V3XI32TYPE:]] [[#I32TYPE]] 3
; CHECK-SPIRV-DAG: TypeVector [[#V4XI32TYPE:]] [[#I32TYPE]] 4
; CHECK-SPIRV-DAG: TypeVector [[#V8XI32TYPE:]] [[#I32TYPE]] 8
; CHECK-SPIRV-DAG: TypeVector [[#V16XI32TYPE:]] [[#I32TYPE]] 16
; CHECK-SPIRV-DAG: TypeVector [[#V2XI64TYPE:]] [[#I64TYPE]] 2
; CHECK-SPIRV-DAG: TypeVector [[#V3XI64TYPE:]] [[#I64TYPE]] 3
; CHECK-SPIRV-DAG: TypeVector [[#V4XI64TYPE:]] [[#I64TYPE]] 4
; CHECK-SPIRV-DAG: TypeVector [[#V8XI64TYPE:]] [[#I64TYPE]] 8
; CHECK-SPIRV-DAG: TypeVector [[#V16XI64TYPE:]] [[#I64TYPE]] 16

; -------- I8 --------

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