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Convert extension tests to opaque pointers (#2131)
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This is a bulk conversion done using the migration script.

There are more extension tests to be converted; however they will need
manual fixups, so leave them out of this bulk conversion.
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@svenvh
svenvh authored Aug 22, 2023
1 parent d021f75 commit e6eae86
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Showing 65 changed files with 1,676 additions and 2,238 deletions.
4 changes: 2 additions & 2 deletions test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_double.ll
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Expand Up @@ -20,9 +20,9 @@ target triple = "spir64"
; Function Attrs: nounwind
define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
entry:
%0 = atomicrmw fmin double addrspace(1)* @f, double 42.000000e+00 seq_cst
%0 = atomicrmw fmin ptr addrspace(1) @f, double 42.000000e+00 seq_cst
; CHECK: AtomicFMinEXT [[Double]] {{[0-9]+}} [[DoublePointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[DoubleValue]]
%1 = atomicrmw fmax double addrspace(1)* @f, double 42.000000e+00 seq_cst
%1 = atomicrmw fmax ptr addrspace(1) @f, double 42.000000e+00 seq_cst
; CHECK: AtomicFMaxEXT [[Double]] {{[0-9]+}} [[DoublePointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[DoubleValue]]

ret void
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4 changes: 2 additions & 2 deletions test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_float.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,9 @@ target triple = "spir64"
; Function Attrs: nounwind
define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
entry:
%0 = atomicrmw fmin float addrspace(1)* @f, float 42.000000e+00 seq_cst
%0 = atomicrmw fmin ptr addrspace(1) @f, float 42.000000e+00 seq_cst
; CHECK: AtomicFMinEXT [[Float]] {{[0-9]+}} [[FPPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[FPValue]]
%1 = atomicrmw fmax float addrspace(1)* @f, float 42.000000e+00 seq_cst
%1 = atomicrmw fmax ptr addrspace(1) @f, float 42.000000e+00 seq_cst
; CHECK: AtomicFMaxEXT [[Float]] {{[0-9]+}} [[FPPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[FPValue]]

ret void
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4 changes: 2 additions & 2 deletions test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_half.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,9 @@ target triple = "spir64"
; Function Attrs: nounwind
define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
entry:
%0 = atomicrmw fmin half addrspace(1)* @f, half 42.000000e+00 seq_cst
%0 = atomicrmw fmin ptr addrspace(1) @f, half 42.000000e+00 seq_cst
; CHECK: AtomicFMinEXT [[Half]] {{[0-9]+}} [[HalfPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[HalfValue]]
%1 = atomicrmw fmax half addrspace(1)* @f, half 42.000000e+00 seq_cst
%1 = atomicrmw fmax ptr addrspace(1) @f, half 42.000000e+00 seq_cst
; CHECK: AtomicFMaxEXT [[Half]] {{[0-9]+}} [[HalfPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[HalfValue]]

ret void
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308 changes: 124 additions & 184 deletions ...TEL_arbitrary_precision_fixed_point/capability-arbitrary-precision-fixed-point-numbers.ll
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1,034 changes: 411 additions & 623 deletions ...INTEL_arbitrary_precision_floating_point/capability-arbitrary-precision-floating-point.ll
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20 changes: 10 additions & 10 deletions ...s/INTEL/SPV_INTEL_arbitrary_precision_integers/capability-arbitrary-precision-integers.ll
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72 changes: 36 additions & 36 deletions test/extensions/INTEL/SPV_INTEL_blocking_pipes/PipeBlocking.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -40,88 +40,88 @@ target triple = "spir64-unknown-unknown"
; CHECK-SPV-IR: call spir_func void @_Z30__spirv_WritePipeBlockingINTEL{{.*}}(target("spirv.Pipe", 1){{.*}}, ptr addrspace(4){{.*}}, i32 2, i32 2)

; Function Attrs: convergent noinline nounwind optnone
define spir_func void @foo(target("spirv.Pipe", 0) %p, i32 addrspace(1)* %ptr) #0 {
define spir_func void @foo(target("spirv.Pipe", 0) %p, ptr addrspace(1) %ptr) #0 {
entry:
%p.addr = alloca target("spirv.Pipe", 0), align 8
%ptr.addr = alloca i32 addrspace(1)*, align 8
%ptr.addr = alloca ptr addrspace(1), align 8
store target("spirv.Pipe", 0) %p, target("spirv.Pipe", 0)* %p.addr, align 8
store i32 addrspace(1)* %ptr, i32 addrspace(1)** %ptr.addr, align 8
store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
%0 = load target("spirv.Pipe", 0), target("spirv.Pipe", 0)* %p.addr, align 8
%1 = load i32 addrspace(1)*, i32 addrspace(1)** %ptr.addr, align 8
%2 = addrspacecast i32 addrspace(1)* %1 to i32 addrspace(4)*
call spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0) %0, i32 addrspace(4)* %2, i32 4, i32 4)
%1 = load ptr addrspace(1), ptr %ptr.addr, align 8
%2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
call spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0) %0, ptr addrspace(4) %2, i32 4, i32 4)
ret void
}

declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0), i32 addrspace(4)*, i32, i32)
declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0), ptr addrspace(4), i32, i32)

; Function Attrs: convergent noinline nounwind optnone
define spir_func void @bar(target("spirv.Pipe", 0) %p, i32 addrspace(1)* %ptr) #0 {
define spir_func void @bar(target("spirv.Pipe", 0) %p, ptr addrspace(1) %ptr) #0 {
entry:
%p.addr = alloca target("spirv.Pipe", 0), align 8
%ptr.addr = alloca i32 addrspace(1)*, align 8
%ptr.addr = alloca ptr addrspace(1), align 8
store target("spirv.Pipe", 0) %p, target("spirv.Pipe", 0)* %p.addr, align 8
store i32 addrspace(1)* %ptr, i32 addrspace(1)** %ptr.addr, align 8
store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
%0 = load target("spirv.Pipe", 0), target("spirv.Pipe", 0)* %p.addr, align 8
%1 = load i32 addrspace(1)*, i32 addrspace(1)** %ptr.addr, align 8
%2 = addrspacecast i32 addrspace(1)* %1 to i8 addrspace(4)*
call spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0) %0, i8 addrspace(4)* %2, i32 4, i32 4)
%1 = load ptr addrspace(1), ptr %ptr.addr, align 8
%2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
call spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0) %0, ptr addrspace(4) %2, i32 4, i32 4)
ret void
}

declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0), i8 addrspace(4)*, i32, i32)
declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0), ptr addrspace(4), i32, i32)

; Function Attrs: convergent noinline nounwind optnone
define spir_func void @boo(target("spirv.Pipe", 1) %p, i32 addrspace(1)* %ptr) #0 {
define spir_func void @boo(target("spirv.Pipe", 1) %p, ptr addrspace(1) %ptr) #0 {
entry:
%p.addr = alloca target("spirv.Pipe", 1), align 8
%ptr.addr = alloca i32 addrspace(1)*, align 8
%ptr.addr = alloca ptr addrspace(1), align 8
store target("spirv.Pipe", 1) %p, target("spirv.Pipe", 1)* %p.addr, align 8
store i32 addrspace(1)* %ptr, i32 addrspace(1)** %ptr.addr, align 8
store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
%0 = load target("spirv.Pipe", 1), target("spirv.Pipe", 1)* %p.addr, align 8
%1 = load i32 addrspace(1)*, i32 addrspace(1)** %ptr.addr, align 8
%2 = addrspacecast i32 addrspace(1)* %1 to i32 addrspace(4)*
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1) %0, i32 addrspace(4)* %2, i32 4, i32 4)
%1 = load ptr addrspace(1), ptr %ptr.addr, align 8
%2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1) %0, ptr addrspace(4) %2, i32 4, i32 4)
ret void
}

declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1), i32 addrspace(4)*, i32, i32)
declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1), ptr addrspace(4), i32, i32)

; Function Attrs: convergent noinline nounwind optnone
define spir_func void @baz(target("spirv.Pipe", 1) %p, i32 addrspace(1)* %ptr) #0 {
define spir_func void @baz(target("spirv.Pipe", 1) %p, ptr addrspace(1) %ptr) #0 {
entry:
%p.addr = alloca target("spirv.Pipe", 1), align 8
%ptr.addr = alloca i32 addrspace(1)*, align 8
%ptr.addr = alloca ptr addrspace(1), align 8
store target("spirv.Pipe", 1) %p, target("spirv.Pipe", 1)* %p.addr, align 8
store i32 addrspace(1)* %ptr, i32 addrspace(1)** %ptr.addr, align 8
store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
%0 = load target("spirv.Pipe", 1), target("spirv.Pipe", 1)* %p.addr, align 8
%1 = load i32 addrspace(1)*, i32 addrspace(1)** %ptr.addr, align 8
%2 = addrspacecast i32 addrspace(1)* %1 to i8 addrspace(4)*
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePvii(target("spirv.Pipe", 1) %0, i8 addrspace(4)* %2, i32 4, i32 4)
%1 = load ptr addrspace(1), ptr %ptr.addr, align 8
%2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePvii(target("spirv.Pipe", 1) %0, ptr addrspace(4) %2, i32 4, i32 4)
ret void
}

declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePvii(target("spirv.Pipe", 1), i8 addrspace(4)*, i32, i32)
declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePvii(target("spirv.Pipe", 1), ptr addrspace(4), i32, i32)

; CHECK-LLVM: declare spir_func void @__read_pipe_2_bl(ptr addrspace(1), ptr addrspace(4), i32, i32)
; CHECK-LLVM: declare spir_func void @__write_pipe_2_bl(ptr addrspace(1), ptr addrspace(4), i32, i32)

; Function Attrs: convergent mustprogress norecurse nounwind
define linkonce_odr dso_local spir_func void @WritePipeBLockingi9Pointer(i9 addrspace(4)* align 2 dereferenceable(2) %_Data) {
define linkonce_odr dso_local spir_func void @WritePipeBLockingi9Pointer(ptr addrspace(4) align 2 dereferenceable(2) %_Data) {
entry:
%_Data.addr = alloca i9 addrspace(4)*, align 8
%_Data.addr = alloca ptr addrspace(4), align 8
%_WPipe = alloca target("spirv.Pipe", 1), align 8
%_Data.addr.ascast = addrspacecast i9 addrspace(4)** %_Data.addr to i9 addrspace(4)* addrspace(4)*
%_Data.addr.ascast = addrspacecast ptr %_Data.addr to ptr addrspace(4)
%_WPipe.ascast = addrspacecast target("spirv.Pipe", 1)* %_WPipe to target("spirv.Pipe", 1) addrspace(4)*
store i9 addrspace(4)* %_Data, i9 addrspace(4)* addrspace(4)* %_Data.addr.ascast, align 8
%0 = bitcast target("spirv.Pipe", 1)* %_WPipe to i8*
store ptr addrspace(4) %_Data, ptr addrspace(4) %_Data.addr.ascast, align 8
%0 = bitcast target("spirv.Pipe", 1)* %_WPipe to ptr
%1 = load target("spirv.Pipe", 1), target("spirv.Pipe", 1) addrspace(4)* %_WPipe.ascast, align 8
%2 = load i9 addrspace(4)*, i9 addrspace(4)* addrspace(4)* %_Data.addr.ascast, align 8
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1) %1, i9 addrspace(4)* %2, i32 2, i32 2)
%2 = load ptr addrspace(4), ptr addrspace(4) %_Data.addr.ascast, align 8
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1) %1, ptr addrspace(4) %2, i32 2, i32 2)
ret void
}

declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1), i9 addrspace(4)*, i32, i32)
declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1), ptr addrspace(4), i32, i32)

attributes #0 = { convergent noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "denorms-are-zero"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

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17 changes: 7 additions & 10 deletions test/extensions/INTEL/SPV_INTEL_complex_float_mul_div/complex-operations.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -30,17 +30,14 @@ target triple = "spir-unknown-unknown"
%structtype = type { float, float }

; Function Attrs: nounwind
define spir_func void @_Z19cmul_kernel_complexPSt7complexIfES1_S1_(%"struct.std::complex"* noalias nocapture readonly %a, %"struct.std::complex"* noalias nocapture readonly %b, %"struct.std::complex"* noalias nocapture %c) #0 {
define spir_func void @_Z19cmul_kernel_complexPSt7complexIfES1_S1_(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c) #0 {
entry:
%0 = bitcast %"struct.std::complex"* %a to <2 x float>*
%1 = load <2 x float>, <2 x float>* %0, align 4
%2 = bitcast %"struct.std::complex"* %b to <2 x float>*
%3 = load <2 x float>, <2 x float>* %2, align 4
%4 = call spir_func <2 x float> @_Z24__spirv_ComplexFDivINTELDv2_fS_(<2 x float> %1, <2 x float> %3) #0
%ref.tmp.sroa.0.0..sroa_cast5 = bitcast %"struct.std::complex"* %c to <2 x float>*
store <2 x float> %4, <2 x float>* %ref.tmp.sroa.0.0..sroa_cast5, align 4
%5 = call spir_func <2 x float> @_Z24__spirv_ComplexFMulINTELDv2_fS_(<2 x float> %1, <2 x float> %3) #0
store <2 x float> %5, <2 x float>* %ref.tmp.sroa.0.0..sroa_cast5, align 4
%0 = load <2 x float>, ptr %a, align 4
%1 = load <2 x float>, ptr %b, align 4
%2 = call spir_func <2 x float> @_Z24__spirv_ComplexFDivINTELDv2_fS_(<2 x float> %0, <2 x float> %1) #0
store <2 x float> %2, ptr %c, align 4
%3 = call spir_func <2 x float> @_Z24__spirv_ComplexFMulINTELDv2_fS_(<2 x float> %0, <2 x float> %1) #0
store <2 x float> %3, ptr %c, align 4
ret void
}

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26 changes: 13 additions & 13 deletions test/extensions/INTEL/SPV_INTEL_float_controls2/exec_mode_float_control_intel.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,7 @@ entry:
; SPV-DAG: EntryPoint {{[0-9]+}} [[KERNEL1:[0-9]+]] "k_float_controls_1"
; SPV-DAG: EntryPoint {{[0-9]+}} [[KERNEL2:[0-9]+]] "k_float_controls_2"
; SPV-DAG: EntryPoint {{[0-9]+}} [[KERNEL3:[0-9]+]] "k_float_controls_3"
!0 = !{void (i32, i32)* @k_float_controls_0, !"k_float_controls_0", !1, i32 0, !2, !3, !4, i32 0, i32 0}
!0 = !{ptr @k_float_controls_0, !"k_float_controls_0", !1, i32 0, !2, !3, !4, i32 0, i32 0}
!1 = !{i32 2, i32 2}
!2 = !{i32 32, i32 36}
!3 = !{i32 0, i32 0}
Expand All @@ -52,29 +52,29 @@ entry:
!14 = !{i32 1, i32 0}

; SPV-DAG: ExecutionMode [[KERNEL0]] 5620 64
!15 = !{void (i32, i32)* @k_float_controls_0, i32 5620, i32 64}
!15 = !{ptr @k_float_controls_0, i32 5620, i32 64}
; SPV-DAG: ExecutionMode [[KERNEL0]] 5620 32
!16 = !{void (i32, i32)* @k_float_controls_0, i32 5620, i32 32}
!16 = !{ptr @k_float_controls_0, i32 5620, i32 32}
; SPV-DAG: ExecutionMode [[KERNEL0]] 5620 16
!17 = !{void (i32, i32)* @k_float_controls_0, i32 5620, i32 16}
!17 = !{ptr @k_float_controls_0, i32 5620, i32 16}

; SPV-DAG: ExecutionMode [[KERNEL1]] 5621 64
!18 = !{void (i32, i32)* @k_float_controls_1, i32 5621, i32 64}
!18 = !{ptr @k_float_controls_1, i32 5621, i32 64}
; SPV-DAG: ExecutionMode [[KERNEL1]] 5621 32
!19 = !{void (i32, i32)* @k_float_controls_1, i32 5621, i32 32}
!19 = !{ptr @k_float_controls_1, i32 5621, i32 32}
; SPV-DAG: ExecutionMode [[KERNEL1]] 5621 16
!20 = !{void (i32, i32)* @k_float_controls_1, i32 5621, i32 16}
!20 = !{ptr @k_float_controls_1, i32 5621, i32 16}

; SPV-DAG: ExecutionMode [[KERNEL2]] 5622 64
!21 = !{void (i32, i32)* @k_float_controls_2, i32 5622, i32 64}
!21 = !{ptr @k_float_controls_2, i32 5622, i32 64}
; SPV-DAG: ExecutionMode [[KERNEL2]] 5622 32
!22 = !{void (i32, i32)* @k_float_controls_2, i32 5622, i32 32}
!22 = !{ptr @k_float_controls_2, i32 5622, i32 32}
; SPV-DAG: ExecutionMode [[KERNEL2]] 5622 16
!23 = !{void (i32, i32)* @k_float_controls_2, i32 5622, i32 16}
!23 = !{ptr @k_float_controls_2, i32 5622, i32 16}

; SPV-DAG: ExecutionMode [[KERNEL3]] 5623 64
!24 = !{void (i32, i32)* @k_float_controls_3, i32 5623, i32 64}
!24 = !{ptr @k_float_controls_3, i32 5623, i32 64}
; SPV-DAG: ExecutionMode [[KERNEL3]] 5623 32
!25 = !{void (i32, i32)* @k_float_controls_3, i32 5623, i32 32}
!25 = !{ptr @k_float_controls_3, i32 5623, i32 32}
; SPV-DAG: ExecutionMode [[KERNEL3]] 5623 16
!26 = !{void (i32, i32)* @k_float_controls_3, i32 5623, i32 16}
!26 = !{ptr @k_float_controls_3, i32 5623, i32 16}
16 changes: 8 additions & 8 deletions test/extensions/INTEL/SPV_INTEL_fp_fast_math_mode/fp_contract_reassoc_fast_mode.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -27,16 +27,16 @@ define spir_kernel void @test(float %a, float %b) #0 !kernel_arg_addr_space !3 !
entry:
%a.addr = alloca float, align 4
%b.addr = alloca float, align 4
store float %a, float* %a.addr, align 4
store float %b, float* %b.addr, align 4
%0 = load float, float* %a.addr, align 4
%1 = load float, float* %a.addr, align 4
store float %a, ptr %a.addr, align 4
store float %b, ptr %b.addr, align 4
%0 = load float, ptr %a.addr, align 4
%1 = load float, ptr %a.addr, align 4
%mul = fmul contract float %0, %1
store float %mul, float* %b.addr, align 4
%2 = load float, float* %b.addr, align 4
%3 = load float, float* %b.addr, align 4
store float %mul, ptr %b.addr, align 4
%2 = load float, ptr %b.addr, align 4
%3 = load float, ptr %b.addr, align 4
%sub = fsub reassoc float %2, %3
store float %sub, float* %b.addr, align 4
store float %sub, ptr %b.addr, align 4
ret void
}

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2 changes: 1 addition & 1 deletion test/extensions/INTEL/SPV_INTEL_fpga_argument_interfaces/sycl-kernel-arg-annotation.ll
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Expand Up @@ -10,7 +10,7 @@ target triple = "spir64-unknown-unknown"
$_ZTS4MyIP = comdat any

; Function Attrs: convergent mustprogress norecurse
define weak_odr dso_local spir_kernel void @_ZTS4MyIP(i32 addrspace(4)* noundef %_arg_p) #0 comdat !kernel_arg_buffer_location !1587 !spirv.ParameterDecorations !1588
define weak_odr dso_local spir_kernel void @_ZTS4MyIP(ptr addrspace(4) noundef %_arg_p) #0 comdat !kernel_arg_buffer_location !1587 !spirv.ParameterDecorations !1588
; CHECK-LLVM-DAG: !spirv.ParameterDecorations ![[PARMDECOR:[0-9]+]]
{
entry:
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22 changes: 11 additions & 11 deletions test/extensions/INTEL/SPV_INTEL_fpga_dsp_control/prefer_dsp.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -57,29 +57,29 @@ define dso_local i32 @main() #0 {
entry:
%retval = alloca i32, align 4
%agg.tmp = alloca %class.anon, align 1
store i32 0, i32* %retval, align 4
call spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(%class.anon* byval(%class.anon) align 1 %agg.tmp)
store i32 0, ptr %retval, align 4
call spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(ptr byval(%class.anon) align 1 %agg.tmp)
ret i32 0
}

; Function Attrs: noinline optnone mustprogress
define internal spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(%class.anon* byval(%class.anon) align 1 %f) #1 !prefer_dsp !3 {
define internal spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(ptr byval(%class.anon) align 1 %f) #1 !prefer_dsp !3 {
entry:
call spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(1) %f)
call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr nonnull dereferenceable(1) %f)
ret void
}

; Function Attrs: noinline nounwind optnone mustprogress
define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(1) %this) #2 align 2 {
define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr nonnull dereferenceable(1) %this) #2 align 2 {
entry:
%this.addr = alloca %class.anon*, align 8
%this.addr = alloca ptr, align 8
%a = alloca i32, align 4
store %class.anon* %this, %class.anon** %this.addr, align 8
%this1 = load %class.anon*, %class.anon** %this.addr, align 8
store i32 0, i32* %a, align 4
%0 = load i32, i32* %a, align 4
store ptr %this, ptr %this.addr, align 8
%this1 = load ptr, ptr %this.addr, align 8
store i32 0, ptr %a, align 4
%0 = load i32, ptr %a, align 4
%add = add nsw i32 %0, 1
store i32 %add, i32* %a, align 4
store i32 %add, ptr %a, align 4
ret void
}

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22 changes: 11 additions & 11 deletions test/extensions/INTEL/SPV_INTEL_fpga_dsp_control/prefer_dsp_propagate.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -59,29 +59,29 @@ define dso_local i32 @main() #0 {
entry:
%retval = alloca i32, align 4
%agg.tmp = alloca %class.anon, align 1
store i32 0, i32* %retval, align 4
call spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(%class.anon* byval(%class.anon) align 1 %agg.tmp)
store i32 0, ptr %retval, align 4
call spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(ptr byval(%class.anon) align 1 %agg.tmp)
ret i32 0
}

; Function Attrs: noinline optnone mustprogress
define internal spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(%class.anon* byval(%class.anon) align 1 %f) #1 !prefer_dsp !3 !propagate_dsp_preference !3 {
define internal spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(ptr byval(%class.anon) align 1 %f) #1 !prefer_dsp !3 !propagate_dsp_preference !3 {
entry:
call spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(1) %f)
call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr nonnull dereferenceable(1) %f)
ret void
}

; Function Attrs: noinline nounwind optnone mustprogress
define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(1) %this) #2 align 2 {
define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr nonnull dereferenceable(1) %this) #2 align 2 {
entry:
%this.addr = alloca %class.anon*, align 8
%this.addr = alloca ptr, align 8
%a = alloca i32, align 4
store %class.anon* %this, %class.anon** %this.addr, align 8
%this1 = load %class.anon*, %class.anon** %this.addr, align 8
store i32 0, i32* %a, align 4
%0 = load i32, i32* %a, align 4
store ptr %this, ptr %this.addr, align 8
%this1 = load ptr, ptr %this.addr, align 8
store i32 0, ptr %a, align 4
%0 = load i32, ptr %a, align 4
%add = add nsw i32 %0, 1
store i32 %add, i32* %a, align 4
store i32 %add, ptr %a, align 4
ret void
}

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