lib: freertos: consolidate common Xilinx code

Move common code in Xilinx area to consolidated location to remove
redundant code.

Enable A72 and A78 build in BSP for FreeRTOS OS.

Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>

lib/system/freertos/CMakeLists.txt

@@ -21,4 +21,12 @@ if (EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/${PROJECT_MACHINE})
   add_subdirectory(${PROJECT_MACHINE})
 endif (EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/${PROJECT_MACHINE})
 
+if ("${PROJECT_MACHINE}" STREQUAL "zynqmp_a53" OR
+    "${PROJECT_MACHINE}" STREQUAL "zynqmp_a72" OR
+    "${PROJECT_MACHINE}" STREQUAL "zynqmp_a78" OR
+    "${PROJECT_MACHINE}" STREQUAL "zynqmp_r5" OR
+    "${PROJECT_MACHINE}" STREQUAL "zynq7")
+add_subdirectory(xlnx_common)
+endif()
+
 # vim: expandtab:ts=2:sw=2:smartindent

lib/system/freertos/sys.h

@@ -19,8 +19,6 @@
 
 #include <metal/errno.h>
 
-#include "./@PROJECT_MACHINE@/sys.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

lib/system/freertos/xlnx_common/CMakeLists.txt

@@ -1,5 +1,6 @@
 collect (PROJECT_LIB_HEADERS sys.h)
 
 collect (PROJECT_LIB_SOURCES irq.c)
+collect (PROJECT_LIB_SOURCES sys.c)
 
 # vim: expandtab:ts=2:sw=2:smartindent

lib/system/freertos/xlnx_common/irq.c

@@ -5,8 +5,8 @@
  */
 
 /*
- * @file	generic/xlnx_common/irq.c
- * @brief	generic libmetal Xilinx irq controller definitions.
+ * @file	freertos/xlnx_common/irq.c
+ * @brief	freertos libmetal Xilinx irq controller definitions.
  */
 
 #include <metal/errno.h>
@@ -17,6 +17,7 @@
 #include <metal/list.h>
 #include <metal/utilities.h>
 #include <metal/alloc.h>
+#include <metal/system/freertos/xlnx_common/sys.h>
 
 #define MAX_IRQS XLNX_MAXIRQS
 

lib/system/freertos/zynqmp_r5/sys.c → lib/system/freertos/xlnx_common/sys.c

@@ -1,25 +1,40 @@
 /*
- * Copyright (c) 2016, Xilinx Inc. and Contributors. All rights reserved.
- * Copyright (C) 2022, Advanced Micro Devices, Inc.
+ * Copyright (C) 2023, Advanced Micro Devices, Inc.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
 /*
- * @file	freertos/zynqmp_r5/sys.c
+ * @file	freertos/xlnx_common/sys.c
  * @brief	machine specific system primitives implementation.
  */
 
 #include <metal/compiler.h>
 #include <metal/io.h>
 #include <metal/sys.h>
+#include <metal/utilities.h>
 #include <stdint.h>
 #include "xil_cache.h"
 #include "xil_exception.h"
+#include "xscugic.h"
 #include "xil_mmu.h"
+
+#if (defined(__aarch64__) || defined(ARMA53_32)) && !defined(SDT)
+
+#ifdef VERSAL_NET
+#include "xcpu_cortexa78.h"
+#elif defined(versal)
+#include "xcpu_cortexa72.h"
+#else
+#include "xreg_cortexa53.h"
+#endif /* defined(versal) */
+
+#elif defined(ARMR5)
+
 #include "xil_mpu.h"
 #include "xreg_cortexr5.h"
-#include "xscugic.h"
+
+#endif /* (defined(__aarch64__) || defined(ARMA53_32)) && !defined(SDT) */
 
 void sys_irq_restore_enable(unsigned int flags)
 {
@@ -60,10 +75,6 @@ void metal_weak metal_generic_default_poll(void)
 	metal_asm volatile("wfi");
 }
 
-/**
- * The code moved to cortexr5/xil_mpu.c:Xil_MemMap()
- * NULL in pa masks possible Xil_MemMap() errors.
- */
 void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa,
 			       size_t size, unsigned int flags)
 {

lib/system/freertos/xlnx_common/sys.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2015, Xilinx Inc. and Contributors. All rights reserved.
+ * Copyright (c) 2023 Advanced Micro Devices, Inc. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -16,10 +17,16 @@
 #ifndef __METAL_FREERTOS_XLNX_COMMON_SYS__H__
 #define __METAL_FREERTOS_XLNX_COMMON_SYS__H__
 
+#include "xscugic.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#ifndef XLNX_MAXIRQS
+#define XLNX_MAXIRQS XSCUGIC_MAX_NUM_INTR_INPUTS
+#endif
+
 /**
  * @brief	metal_xlnx_irq_isr
  *
@@ -40,6 +47,24 @@ void metal_xlnx_irq_isr(void *arg);
  */
 int metal_xlnx_irq_init(void);
 
+static inline void sys_irq_enable(unsigned int vector)
+{
+#ifdef PLATFORM_ZYNQ
+	XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector);
+#else
+	vPortEnableInterrupt(vector);
+#endif
+}
+
+static inline void sys_irq_disable(unsigned int vector)
+{
+#ifdef PLATFORM_ZYNQ
+	XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector);
+#else
+	vPortDisableInterrupt(vector);
+#endif
+}
+
 #ifdef __cplusplus
 }
 #endif