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@OpenXiangShan

XiangShan

Open-source high-performance RISC-V processor

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  1. XiangShan XiangShan Public

    Open-source high-performance RISC-V processor

    Scala 5k 673

  2. XiangShan-doc XiangShan-doc Public

    Documentation for XiangShan

    TeX 357 135

  3. HuanCun HuanCun Public

    Open-source high-performance non-blocking cache

    Scala 70 33

  4. fudian fudian Public

    Open source high performance IEEE-754 floating unit

    Scala 63 24

  5. difftest difftest Public

    Modern co-simulation framework for RISC-V CPUs

    C++ 124 68

  6. xs-env xs-env Public

    XiangShan Frontend Develop Environment

    Shell 47 48

Repositories

Showing 10 of 69 repositories
  • Deterload Public

    Xiangshan deterministic workloads generator

    OpenXiangShan/Deterload’s past year of commit activity
    JavaScript 11 MulanPSL-2.0 3 2 0 Updated Dec 23, 2024
  • XiangShan-doc Public

    Documentation for XiangShan

    OpenXiangShan/XiangShan-doc’s past year of commit activity
    TeX 357 CC-BY-4.0 135 5 3 Updated Dec 23, 2024
  • XiangShan Public

    Open-source high-performance RISC-V processor

    OpenXiangShan/XiangShan’s past year of commit activity
    Scala 4,981 673 58 53 Updated Dec 23, 2024
  • GEM5 Public
    OpenXiangShan/GEM5’s past year of commit activity
    C++ 71 BSD-3-Clause 29 13 7 Updated Dec 23, 2024
  • ChiselAIA Public

    RISC-V AIA in Chisel

    OpenXiangShan/ChiselAIA’s past year of commit activity
    Scala 4 MulanPSL-2.0 1 10 1 Updated Dec 23, 2024
  • HuanCun Public

    Open-source high-performance non-blocking cache

    OpenXiangShan/HuanCun’s past year of commit activity
    Scala 70 33 2 1 Updated Dec 23, 2024
  • riscv-hyp-tests Public Forked from pxk27/riscv-hyp-tests

    A bare-metal application to test specific features of the risc-v hypervisor extension

    OpenXiangShan/riscv-hyp-tests’s past year of commit activity
    C 2 GPL-3.0 22 0 1 Updated Dec 23, 2024
  • riscv-isa-sim Public Forked from riscv-software-src/riscv-isa-sim

    Spike, a RISC-V ISA Simulator

    OpenXiangShan/riscv-isa-sim’s past year of commit activity
    C 7 888 0 4 Updated Dec 23, 2024
  • NEMU Public
    OpenXiangShan/NEMU’s past year of commit activity
    C 243 93 31 20 Updated Dec 23, 2024
  • YunSuan Public

    This repo includes XiangShan's function units

    OpenXiangShan/YunSuan’s past year of commit activity
    Scala 15 MulanPSL-2.0 11 0 0 Updated Dec 21, 2024
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