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A Verilog implementation of a hand-written digit recognition Neural Network

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PCov3r/FPGA_Handwritten_digit_recognition

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FPGA_Handwritten_digit_recognition

This repository presents an implementation of a fully connected Neural Network used for the recognition of handwritten digit.
The neural network consists of :

  • An average pooling layer
  • A first dense layer of 32 neurons
  • An output layer of 10 neurons


The input vector consists of the flatten 28 by 28 image (ie a 784 elements vector).
The output of the neural network is the handwritten digit.