overutilization of IO ports

[vinisha2410]

hello, i used pynq-z2 board for simulating in vivado, but the simulation failed due to over utilization of io ports. The neuron file requires 4748 io ports but the board contains only 255 ports... could you please tell how to overcome this issue? I used the same pynq z2 board as mentioned. How to get the output as provided in project report pdf ?

[vinisha2410]

can we use ram and rom with case statements for storing and retrieving image and weight data ? do we have to modify lot??

pls help

[PCov3r]

Hi,

When simulating the testbench, I don't recall having any error with the io ports. I'll have a look at it if I have time.
You can try using ram to store and retrieve image and weight data. This would be done by updating the overlay.

Here are a few helpful tutorial:
https://pynq.readthedocs.io/en/v2.0/overlay_design_methodology/overlay_tutorial.html
https://www.fpgadeveloper.com/2018/03/create-a-custom-pynq-overlay-for-pynq-z1.html/

I was not able to develop my own overlay though and just developed the code and testbenches.