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This Repo is to demonstrate RTL to GDSII design implementation

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Pavan-Kendaganna-Swamy/3StagePipeline

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3StagePipeline

This project is to demonstrate Design Implementation flow
Here, I have used a simple pipeline consisting of 3 stages

Project Details

Entire project is built using open source tools called Qflow

I followed these steps to setup

The qflow package contains all the scripts and most of the tools necessary for the open-source digital synthesis flow. It also comes with some of the files from the OSU (Oklahoma State University) 0.35um standard cell library, to provide a default technology.

Tech used : 180nm
synthesis : yosys
Placement : graywolf
sta : vesta
Routing : qrouter
Layout : Magic

Here are some screenshots from log
synth
synth
place
place
sta
STA
route
Route
postRouteSTA
PostRouteSTA
DRC
DRC
LVS
LVS
Layout
Layout

RepoDetails

output folder contains logs and layout
project folder contains files that were generated by the tool

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This Repo is to demonstrate RTL to GDSII design implementation

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