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(LK-C-3) Add controlled MultiRZ support to Lightning Kokkos #954
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4b9062e
initial commit
josephleekl ba70971
initial commit
josephleekl 6ac216a
support controlled 1 qubit gate
josephleekl bea8bf7
add controlled globalphase test
josephleekl 38c48b9
fix controlled globalphase return
josephleekl 968b86e
format
josephleekl 8c97d82
format
josephleekl 09b07d5
format
josephleekl a7106b7
add globalphase python test
josephleekl 34e6400
apply controlled only for 1 qubit gate
josephleekl b1263fa
format
josephleekl 1245270
trigger CI
josephleekl 7ebee0f
fix parity_2_offset to kokkos_inline_function
josephleekl cec599b
separate generate/control bit patterns
josephleekl a01b38a
format
josephleekl 8dec286
initial commit
josephleekl 17ef49b
support 2/3/4 qubit control gates
josephleekl e3911c3
update statevectorkokkos error
josephleekl a136669
update statevectorkokkos error
josephleekl bead29b
test control=wire exception
josephleekl aa944b0
remove controlled toffoli matrix test
josephleekl b98a2a1
fix disable control qubitunitary/blockencode
josephleekl bde08d0
format
josephleekl 35b048a
fix disable multiRZ
josephleekl 993a6f1
separate generate/controlbitpatterns
josephleekl ded7ac4
initial commit
josephleekl dc05a33
initial commit
josephleekl fd0799d
LK support controlled multiRZ
josephleekl 65757fd
format
josephleekl 3e36d9d
fix operation list
josephleekl bc9d408
separate generate/controlbitpatterns
josephleekl 3fb1ec0
add fail matrix test
josephleekl 92f8939
clean up
josephleekl 29d7136
update test
josephleekl 0a4b71d
edit state_vector.py
josephleekl 2a2c4f9
recover c-globalphase + check target_wire=1
josephleekl e4e534f
format
josephleekl d0e75e3
accept list of controlled op
josephleekl 193338c
add control H/T/S/phaseshift test
josephleekl 3367a4b
update globalphase impl
josephleekl 79d5c01
update ali comments
josephleekl 3a99c5a
update comments
josephleekl 4dd344e
update comments
josephleekl 465c46c
update to std::ranges::views
josephleekl bb46635
revert std::view change
josephleekl e148462
add tests with 2 control wires
josephleekl c79d411
format
josephleekl 6c08fbd
fix maybe_unused attribute from lambda to func body
josephleekl ecd8677
update lightning_kokkos.toml
josephleekl a250a76
format
josephleekl 0e160bd
update basicgatefunctors
josephleekl 9502b78
update lambda capture by value
josephleekl 498802e
implement comments
josephleekl 3d1e859
make format
josephleekl a69a4b5
merge with lk-control-base
josephleekl f25011b
merge with lk-control-1Q
josephleekl cc45e61
fix merge issues
josephleekl fedd270
format
josephleekl 10a18bb
update gate functors and toml
josephleekl 82b0b85
add tests
josephleekl 240500e
Merge branch 'lk-control-base' into lk-control-gate-23Q
josephleekl 020c215
fix merge squash
josephleekl b33d680
update alfredo comments
josephleekl b2e278c
update ali comment test instance
josephleekl 9d93fe4
add qml.ctrl test comment
josephleekl d59df2f
update shuli/ali comments
josephleekl 78c925c
Merge branch 'lk-control-gate-23Q' into lk-control-gate-NQ-multiRZ
josephleekl d84a24a
std::tie to structured binding
josephleekl 3f1d800
add util:: namespace
josephleekl a8ec292
Merge branch 'lk-control-gate-23Q' into lk-control-gate-NQ-multiRZ
josephleekl e95b814
Merge branch 'lk-control-base' into lk-control-gate-NQ-multiRZ
josephleekl b76b995
python test and toml
josephleekl 9230d73
update kokkos:: and std::accumulate
josephleekl 21c4a8c
update test name
josephleekl 0a62ea2
add contiguous control test
josephleekl 63114fd
add test
josephleekl e93965b
format test
josephleekl 3cef4e8
remove scratch for NCMultiRZ
josephleekl e8ba058
remove scratch using
josephleekl 8e4ff26
restore measure test
josephleekl bd8b70a
format
josephleekl cf1d66e
add TODO for using shmem for indices in multirz
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Is
shmem_size
used to assign the size of shared memory of GPU if the target is GPU? If yes, how can we make it safer as shared memory size varies from GPUs to GPUs?There was a problem hiding this comment.
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When the scratch memory is set to level 0 (in L85), it is using the GPU Shared memory in the case for Nvidia GPUs. Assuming O(10KB) shared memory, this should be fine for at least 9 wires. If it does exceed this, we could in theory set the scratch memory level to 1, which is larger but slower.
The scratch_size here could actually be smaller, I will update this line from
to
(This kernel does not need scratch memory for the matrix like for qubitunitary)
Some further reference (p.8):
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That's say, would a MultiRZ gate targets at 20 wires with only 1 control wire break the simulation?
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It might actually break it, that's a good point. I'll test it now; in this case I might not use scratch or I will use level 1 scratch (depending on what the performance and memory limit is)
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I've done some investigation with different settings on ISAIC A100:
I have now removed using scratch for this.