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tests/periph/selftest_shield: Fix UART test #21042

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Nov 26, 2024
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11 changes: 9 additions & 2 deletions tests/periph/selftest_shield/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -55,10 +55,14 @@
/* In order to run the periph_uart test all of the following needs to be true:
* - periph_uart needs to be used
* - an I/O mapping for the UART at D0/D1 needs to be provided
* - this UART dev is not busy with stdio
* - this UART dev is not busy with stdio (either not using `stdio_uart` or a different UART is used for stdio)

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*/
#if defined(ARDUINO_UART_D0D1) && defined(MODULE_PERIPH_UART)
# define ENABLE_UART_TEST (STDIO_UART_DEV != ARDUINO_UART_D0D1)
# if MODULE_STDIO_UART
# define ENABLE_UART_TEST (STDIO_UART_DEV != ARDUINO_UART_D0D1)
# else
# define ENABLE_UART_TEST 1
# endif
# define UART_TEST_DEV ARDUINO_UART_D0D1
#else
# define ENABLE_UART_TEST 0
Expand Down Expand Up @@ -790,6 +794,9 @@
failed |= TEST(memcmp(testdata, serial_buf.data, sizeof(serial_buf.data)) == 0);
failed |= TEST(serial_buf.pos == sizeof(testdata));

/* disable UART again, in case it is a shared peripheral */
uart_poweroff(UART_TEST_DEV);

return failed;
}

Expand Down Expand Up @@ -981,16 +988,16 @@
if (DETAILED_OUTPUT) {
printf("SPI CLK %" PRIu32 " Hz\n", clk_hz);
}
failed |= periph_spi_rxtx_test(bus, SPI_MODE_0, clk, clk_hz, clk_check, false, "mode 0", timer_freq);

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failed |= periph_spi_rxtx_test(bus, SPI_MODE_1, clk, clk_hz, clk_check, false, "mode 1", timer_freq);

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failed |= periph_spi_rxtx_test(bus, SPI_MODE_2, clk, clk_hz, clk_check, true, "mode 2", timer_freq);

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failed |= periph_spi_rxtx_test(bus, SPI_MODE_3, clk, clk_hz, clk_check, true, "mode 3", timer_freq);

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}
}
return failed;
}

static bool periph_pwm_test_chan(pwm_t pwm_dev, uint8_t pwm_chan, pwm_mode_t pwm_mode, adc_t adc_line)

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{
bool failed = false;
print_start("PWM", "duty cycle (via ADC)");
Expand Down Expand Up @@ -1033,10 +1040,10 @@

for (unsigned i = 0; i < ARRAY_SIZE(modes); i++) {
if (ENABLE_PWM_TEST_D5) {
failed |= periph_pwm_test_chan(ARDUINO_PIN_5_PWM_DEV, ARDUINO_PIN_5_PWM_CHAN, modes[i], ARDUINO_A2);

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}
if (ENABLE_PWM_TEST_D6) {
failed |= periph_pwm_test_chan(ARDUINO_PIN_6_PWM_DEV, ARDUINO_PIN_6_PWM_CHAN, modes[i], ARDUINO_A1);

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}
}

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