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[msan] Don't crash in CreateShadowCast on vscale (llvm#90126)
Code expects `VectorOrPrimitiveTypeSizeInBits` compile time value, which is not available for vscale. In trivial case of the same type we need to do nothing.
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 | ||
; RUN: opt < %s -S -msan-check-access-address=0 -passes="msan" 2>&1 | FileCheck %s | ||
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" | ||
target triple = "x86_64-unknown-linux-gnu" | ||
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define void @test_load_store_i32(ptr %a, ptr %b) sanitize_memory { | ||
; CHECK-LABEL: define void @test_load_store_i32( | ||
; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0:[0-9]+]] { | ||
; CHECK-NEXT: call void @llvm.donothing() | ||
; CHECK-NEXT: [[TMP1:%.*]] = load <vscale x 4 x i32>, ptr [[A]], align 16 | ||
; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[A]] to i64 | ||
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP2]], 87960930222080 | ||
; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr | ||
; CHECK-NEXT: [[_MSLD:%.*]] = load <vscale x 4 x i32>, ptr [[TMP4]], align 16 | ||
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[B]] to i64 | ||
; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080 | ||
; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr | ||
; CHECK-NEXT: store <vscale x 4 x i32> [[_MSLD]], ptr [[TMP7]], align 16 | ||
; CHECK-NEXT: store <vscale x 4 x i32> [[TMP1]], ptr [[B]], align 16 | ||
; CHECK-NEXT: ret void | ||
; | ||
%1 = load <vscale x 4 x i32>, ptr %a | ||
store <vscale x 4 x i32> %1, ptr %b | ||
ret void | ||
} | ||
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define void @test_load_store_add_int(ptr %a, ptr %b) sanitize_memory { | ||
; CHECK-LABEL: define void @test_load_store_add_int( | ||
; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] { | ||
; CHECK-NEXT: call void @llvm.donothing() | ||
; CHECK-NEXT: [[TMP1:%.*]] = load <vscale x 8 x i64>, ptr [[A]], align 64 | ||
; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[A]] to i64 | ||
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP2]], 87960930222080 | ||
; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr | ||
; CHECK-NEXT: [[_MSLD:%.*]] = load <vscale x 8 x i64>, ptr [[TMP4]], align 64 | ||
; CHECK-NEXT: [[TMP5:%.*]] = load <vscale x 8 x i64>, ptr [[B]], align 64 | ||
; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[B]] to i64 | ||
; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 87960930222080 | ||
; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr | ||
; CHECK-NEXT: [[_MSLD1:%.*]] = load <vscale x 8 x i64>, ptr [[TMP8]], align 64 | ||
; CHECK-NEXT: [[_MSPROP:%.*]] = or <vscale x 8 x i64> [[_MSLD]], [[_MSLD1]] | ||
; CHECK-NEXT: [[TMP9:%.*]] = add <vscale x 8 x i64> [[TMP1]], [[TMP5]] | ||
; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[B]] to i64 | ||
; CHECK-NEXT: [[TMP11:%.*]] = xor i64 [[TMP10]], 87960930222080 | ||
; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr | ||
; CHECK-NEXT: store <vscale x 8 x i64> [[_MSLD1]], ptr [[TMP12]], align 64 | ||
; CHECK-NEXT: store <vscale x 8 x i64> [[TMP5]], ptr [[B]], align 64 | ||
; CHECK-NEXT: ret void | ||
; | ||
%1 = load <vscale x 8 x i64>, ptr %a | ||
%2 = load <vscale x 8 x i64>, ptr %b | ||
%3 = add <vscale x 8 x i64> %1, %2 | ||
store <vscale x 8 x i64> %2, ptr %b | ||
ret void | ||
} | ||
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define void @test_load_store_float(ptr %a, ptr %b) sanitize_memory { | ||
; CHECK-LABEL: define void @test_load_store_float( | ||
; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] { | ||
; CHECK-NEXT: call void @llvm.donothing() | ||
; CHECK-NEXT: [[TMP1:%.*]] = load <vscale x 4 x float>, ptr [[A]], align 16 | ||
; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[A]] to i64 | ||
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP2]], 87960930222080 | ||
; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr | ||
; CHECK-NEXT: [[_MSLD:%.*]] = load <vscale x 4 x i32>, ptr [[TMP4]], align 16 | ||
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[B]] to i64 | ||
; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080 | ||
; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr | ||
; CHECK-NEXT: store <vscale x 4 x i32> [[_MSLD]], ptr [[TMP7]], align 16 | ||
; CHECK-NEXT: store <vscale x 4 x float> [[TMP1]], ptr [[B]], align 16 | ||
; CHECK-NEXT: ret void | ||
; | ||
%1 = load <vscale x 4 x float>, ptr %a | ||
store <vscale x 4 x float> %1, ptr %b | ||
ret void | ||
} | ||
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define void @test_load_store_add_float(ptr %a, ptr %b) sanitize_memory { | ||
; CHECK-LABEL: define void @test_load_store_add_float( | ||
; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] { | ||
; CHECK-NEXT: call void @llvm.donothing() | ||
; CHECK-NEXT: [[TMP1:%.*]] = load <vscale x 2 x float>, ptr [[A]], align 8 | ||
; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[A]] to i64 | ||
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP2]], 87960930222080 | ||
; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr | ||
; CHECK-NEXT: [[_MSLD:%.*]] = load <vscale x 2 x i32>, ptr [[TMP4]], align 8 | ||
; CHECK-NEXT: [[TMP5:%.*]] = load <vscale x 2 x float>, ptr [[B]], align 8 | ||
; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[B]] to i64 | ||
; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 87960930222080 | ||
; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr | ||
; CHECK-NEXT: [[_MSLD1:%.*]] = load <vscale x 2 x i32>, ptr [[TMP8]], align 8 | ||
; CHECK-NEXT: [[_MSPROP:%.*]] = or <vscale x 2 x i32> [[_MSLD]], [[_MSLD1]] | ||
; CHECK-NEXT: [[TMP9:%.*]] = fadd <vscale x 2 x float> [[TMP1]], [[TMP5]] | ||
; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[B]] to i64 | ||
; CHECK-NEXT: [[TMP11:%.*]] = xor i64 [[TMP10]], 87960930222080 | ||
; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr | ||
; CHECK-NEXT: store <vscale x 2 x i32> [[_MSLD1]], ptr [[TMP12]], align 8 | ||
; CHECK-NEXT: store <vscale x 2 x float> [[TMP5]], ptr [[B]], align 8 | ||
; CHECK-NEXT: ret void | ||
; | ||
%1 = load <vscale x 2 x float>, ptr %a | ||
%2 = load <vscale x 2 x float>, ptr %b | ||
%3 = fadd <vscale x 2 x float> %1, %2 | ||
store <vscale x 2 x float> %2, ptr %b | ||
ret void | ||
} |