Revert "[BPF] introduce __attribute__((bpf_fastcall)) (llvm#101228)"

This reverts commit e9b2e16.
Reverting because of the test failure:
https://lab.llvm.org/buildbot/#/builders/187/builds/509

clang/include/clang/Basic/Attr.td

@@ -2200,15 +2200,6 @@ def BTFTypeTag : TypeAttr {
   let LangOpts = [COnly];
 }
 
-def BPFFastCall : InheritableAttr,
-                  TargetSpecificAttr<TargetBPF> {
-  let Spellings = [Clang<"bpf_fastcall">];
-  let Subjects = SubjectList<[FunctionLike]>;
-  let Documentation = [BPFFastCallDocs];
-  let LangOpts = [COnly];
-  let SimpleHandler = 1;
-}
-
 def WebAssemblyExportName : InheritableAttr,
                             TargetSpecificAttr<TargetWebAssembly> {
   let Spellings = [Clang<"export_name">];

clang/include/clang/Basic/AttrDocs.td

@@ -2345,25 +2345,6 @@ section.
   }];
 }
 
-def BPFFastCallDocs : Documentation {
-  let Category = DocCatType;
-  let Content = [{
-Functions annotated with this attribute are likely to be inlined by BPF JIT.
-It is assumed that inlined implementation uses less caller saved registers,
-than a regular function.
-Specifically, the following registers are likely to be preserved:
-- ``R0`` if function return value is ``void``;
-- ``R2-R5` if function takes 1 argument;
-- ``R3-R5` if function takes 2 arguments;
-- ``R4-R5` if function takes 3 arguments;
-- ``R5`` if function takes 4 arguments;
-
-For such functions Clang generates code pattern that allows BPF JIT
-to recognize and remove unnecessary spills and fills of the preserved
-registers.
-  }];
-}
-
 def MipsInterruptDocs : Documentation {
   let Category = DocCatFunction;
   let Heading = "interrupt (MIPS)";

clang/lib/CodeGen/CGCall.cpp

@@ -2422,8 +2422,6 @@ void CodeGenModule::ConstructAttributeList(StringRef Name,
       FuncAttrs.addAttribute(llvm::Attribute::NoCfCheck);
     if (TargetDecl->hasAttr<LeafAttr>())
       FuncAttrs.addAttribute(llvm::Attribute::NoCallback);
-    if (TargetDecl->hasAttr<BPFFastCallAttr>())
-      FuncAttrs.addAttribute("bpf_fastcall");
 
     HasOptnone = TargetDecl->hasAttr<OptimizeNoneAttr>();
     if (auto *AllocSize = TargetDecl->getAttr<AllocSizeAttr>()) {

clang/test/Misc/pragma-attribute-supported-attributes-list.test

@@ -22,7 +22,6 @@
 // CHECK-NEXT: AssumeAligned (SubjectMatchRule_objc_method, SubjectMatchRule_function)
 // CHECK-NEXT: Availability ((SubjectMatchRule_record, SubjectMatchRule_enum, SubjectMatchRule_enum_constant, SubjectMatchRule_field, SubjectMatchRule_function, SubjectMatchRule_namespace, SubjectMatchRule_objc_category, SubjectMatchRule_objc_implementation, SubjectMatchRule_objc_interface, SubjectMatchRule_objc_method, SubjectMatchRule_objc_property, SubjectMatchRule_objc_protocol, SubjectMatchRule_record, SubjectMatchRule_type_alias, SubjectMatchRule_variable))
 // CHECK-NEXT: AvailableOnlyInDefaultEvalMethod (SubjectMatchRule_type_alias)
-// CHECK-NEXT: BPFFastCall (SubjectMatchRule_hasType_functionType)
 // CHECK-NEXT: BPFPreserveAccessIndex (SubjectMatchRule_record)
 // CHECK-NEXT: BPFPreserveStaticOffset (SubjectMatchRule_record)
 // CHECK-NEXT: BTFDeclTag (SubjectMatchRule_variable, SubjectMatchRule_function, SubjectMatchRule_record, SubjectMatchRule_field, SubjectMatchRule_type_alias)

llvm/lib/Target/BPF/BPFCallingConv.td

@@ -46,4 +46,3 @@ def CC_BPF32 : CallingConv<[
 ]>;
 
 def CSR : CalleeSavedRegs<(add R6, R7, R8, R9, R10)>;
-def CSR_PreserveAll : CalleeSavedRegs<(add R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10)>;

llvm/lib/Target/BPF/BPFISelLowering.cpp

@@ -402,21 +402,6 @@ SDValue BPFTargetLowering::LowerFormalArguments(
 
 const size_t BPFTargetLowering::MaxArgs = 5;
 
-static void resetRegMaskBit(const TargetRegisterInfo *TRI, uint32_t *RegMask,
-                            MCRegister Reg) {
-  for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg))
-    RegMask[SubReg / 32] &= ~(1u << (SubReg % 32));
-}
-
-static uint32_t *regMaskFromTemplate(const TargetRegisterInfo *TRI,
-                                     MachineFunction &MF,
-                                     const uint32_t *BaseRegMask) {
-  uint32_t *RegMask = MF.allocateRegMask();
-  unsigned RegMaskSize = MachineOperand::getRegMaskSize(TRI->getNumRegs());
-  memcpy(RegMask, BaseRegMask, sizeof(RegMask[0]) * RegMaskSize);
-  return RegMask;
-}
-
 SDValue BPFTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
                                      SmallVectorImpl<SDValue> &InVals) const {
   SelectionDAG &DAG = CLI.DAG;
@@ -528,22 +513,6 @@ SDValue BPFTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
   for (auto &Reg : RegsToPass)
     Ops.push_back(DAG.getRegister(Reg.first, Reg.second.getValueType()));
 
-  bool HasFastCall =
-      (CLI.CB && isa<CallInst>(CLI.CB) && CLI.CB->hasFnAttr("bpf_fastcall"));
-  const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
-  if (HasFastCall) {
-    uint32_t *RegMask = regMaskFromTemplate(
-        TRI, MF, TRI->getCallPreservedMask(MF, CallingConv::PreserveAll));
-    for (auto const &RegPair : RegsToPass)
-      resetRegMaskBit(TRI, RegMask, RegPair.first);
-    if (!CLI.CB->getType()->isVoidTy())
-      resetRegMaskBit(TRI, RegMask, BPF::R0);
-    Ops.push_back(DAG.getRegisterMask(RegMask));
-  } else {
-    Ops.push_back(
-        DAG.getRegisterMask(TRI->getCallPreservedMask(MF, CLI.CallConv)));
-  }
-
   if (InGlue.getNode())
     Ops.push_back(InGlue);
 

llvm/lib/Target/BPF/BPFInstrInfo.td

@@ -677,7 +677,9 @@ let isBranch = 1, isTerminator = 1, hasDelaySlot=0, isBarrier = 1 in {
 }
 
 // Jump and link
-let isCall=1, hasDelaySlot=0, Uses = [R11] in {
+let isCall=1, hasDelaySlot=0, Uses = [R11],
+    // Potentially clobbered registers
+    Defs = [R0, R1, R2, R3, R4, R5] in {
   def JAL  : CALL<"call">;
   def JALX  : CALLX<"callx">;
 }

llvm/lib/Target/BPF/BPFMIPeephole.cpp

@@ -24,8 +24,6 @@
 #include "BPFInstrInfo.h"
 #include "BPFTargetMachine.h"
 #include "llvm/ADT/Statistic.h"
-#include "llvm/CodeGen/LivePhysRegs.h"
-#include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
@@ -321,7 +319,6 @@ struct BPFMIPreEmitPeephole : public MachineFunctionPass {
   bool in16BitRange(int Num);
   bool eliminateRedundantMov();
   bool adjustBranch();
-  bool insertMissingCallerSavedSpills();
 
 public:
 
@@ -336,7 +333,6 @@ struct BPFMIPreEmitPeephole : public MachineFunctionPass {
     Changed = eliminateRedundantMov();
     if (SupportGotol)
       Changed = adjustBranch() || Changed;
-    Changed |= insertMissingCallerSavedSpills();
     return Changed;
   }
 };
@@ -600,88 +596,6 @@ bool BPFMIPreEmitPeephole::adjustBranch() {
   return Changed;
 }
 
-static const unsigned CallerSavedRegs[] = {BPF::R0, BPF::R1, BPF::R2,
-                                           BPF::R3, BPF::R4, BPF::R5};
-
-struct BPFFastCall {
-  MachineInstr *MI;
-  unsigned LiveCallerSavedRegs;
-};
-
-static void collectBPFFastCalls(const TargetRegisterInfo *TRI,
-                                LivePhysRegs &LiveRegs, MachineBasicBlock &BB,
-                                SmallVectorImpl<BPFFastCall> &Calls) {
-  LiveRegs.init(*TRI);
-  LiveRegs.addLiveOuts(BB);
-  Calls.clear();
-  for (MachineInstr &MI : llvm::reverse(BB)) {
-    if (MI.isCall()) {
-      unsigned LiveCallerSavedRegs = 0;
-      for (MCRegister R : CallerSavedRegs) {
-        bool DoSpillFill = !MI.definesRegister(R, TRI) && LiveRegs.contains(R);
-        if (!DoSpillFill)
-          continue;
-        LiveCallerSavedRegs |= 1 << R;
-      }
-      if (LiveCallerSavedRegs)
-        Calls.push_back({&MI, LiveCallerSavedRegs});
-    }
-    LiveRegs.stepBackward(MI);
-  }
-}
-
-static int64_t computeMinFixedObjOffset(MachineFrameInfo &MFI,
-                                        unsigned SlotSize) {
-  int64_t MinFixedObjOffset = 0;
-  // Same logic as in X86FrameLowering::adjustFrameForMsvcCxxEh()
-  for (int I = MFI.getObjectIndexBegin(); I < MFI.getObjectIndexEnd(); ++I) {
-    if (MFI.isDeadObjectIndex(I))
-      continue;
-    MinFixedObjOffset = std::min(MinFixedObjOffset, MFI.getObjectOffset(I));
-  }
-  MinFixedObjOffset -=
-      (SlotSize + MinFixedObjOffset % SlotSize) & (SlotSize - 1);
-  return MinFixedObjOffset;
-}
-
-bool BPFMIPreEmitPeephole::insertMissingCallerSavedSpills() {
-  MachineFrameInfo &MFI = MF->getFrameInfo();
-  SmallVector<BPFFastCall, 8> Calls;
-  LivePhysRegs LiveRegs;
-  const unsigned SlotSize = 8;
-  int64_t MinFixedObjOffset = computeMinFixedObjOffset(MFI, SlotSize);
-  bool Changed = false;
-  for (MachineBasicBlock &BB : *MF) {
-    collectBPFFastCalls(TRI, LiveRegs, BB, Calls);
-    Changed |= !Calls.empty();
-    for (BPFFastCall &Call : Calls) {
-      int64_t CurOffset = MinFixedObjOffset;
-      for (MCRegister Reg : CallerSavedRegs) {
-        if (((1 << Reg) & Call.LiveCallerSavedRegs) == 0)
-          continue;
-        // Allocate stack object
-        CurOffset -= SlotSize;
-        MFI.CreateFixedSpillStackObject(SlotSize, CurOffset);
-        // Generate spill
-        BuildMI(BB, Call.MI->getIterator(), Call.MI->getDebugLoc(),
-                TII->get(BPF::STD))
-            .addReg(Reg)
-            .addReg(BPF::R10)
-            .addImm(CurOffset)
-            .addImm(0);
-        // Generate fill
-        BuildMI(BB, ++Call.MI->getIterator(), Call.MI->getDebugLoc(),
-                TII->get(BPF::LDD))
-            .addReg(Reg)
-            .addReg(BPF::R10)
-            .addImm(CurOffset)
-            .addImm(0);
-      }
-    }
-  }
-  return Changed;
-}
-
 } // end default namespace
 
 INITIALIZE_PASS(BPFMIPreEmitPeephole, "bpf-mi-pemit-peephole",

llvm/lib/Target/BPF/BPFRegisterInfo.cpp

@@ -40,17 +40,6 @@ BPFRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
   return CSR_SaveList;
 }
 
-const uint32_t *
-BPFRegisterInfo::getCallPreservedMask(const MachineFunction &MF,
-                                      CallingConv::ID CC) const {
-  switch (CC) {
-  default:
-    return CSR_RegMask;
-  case CallingConv::PreserveAll:
-    return CSR_PreserveAll_RegMask;
-  }
-}
-
 BitVector BPFRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   BitVector Reserved(getNumRegs());
   markSuperRegs(Reserved, BPF::W10); // [W|R]10 is read only frame pointer

llvm/lib/Target/BPF/BPFRegisterInfo.h

@@ -26,9 +26,6 @@ struct BPFRegisterInfo : public BPFGenRegisterInfo {
 
   const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
 
-  const uint32_t *getCallPreservedMask(const MachineFunction &MF,
-                                       CallingConv::ID) const override;
-
   BitVector getReservedRegs(const MachineFunction &MF) const override;
 
   bool eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,