[test] Improve x86 inline asm tests

Reorganize *asm-modifier* and make other cleanups.

llvm/test/CodeGen/X86/asm-modifier-error.ll

@@ -7,3 +7,9 @@ entry:
   ret void
 }
 
+;CHECK: error: invalid operand in inline asm: 'vmovd ${1:k}, $0'
+define i32 @foo() {
+entry:
+  %0 = tail call i32 asm sideeffect "vmovd ${1:k}, $0", "=r,x,~{dirflag},~{fpsr},~{flags}"(<2 x i64> <i64 240518168632, i64 240518168632>)
+  ret i32 %0
+}

llvm/test/CodeGen/X86/asm-modifier-macho.ll

@@ -0,0 +1,41 @@
+; RUN: llc < %s | FileCheck %s
+; ModuleID = 'asm.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+
+define i32 @test1() nounwind {
+entry:
+; CHECK-LABEL: test1:
+; CHECK: movw	%gs:6, %ax
+  %asmtmp.i = tail call i16 asm "movw\09%gs:${1:a}, ${0:w}", "=r,ir,~{dirflag},~{fpsr},~{flags}"(i32 6) nounwind ; <i16> [#uses=1]
+  %0 = zext i16 %asmtmp.i to i32                  ; <i32> [#uses=1]
+  ret i32 %0
+}
+
+define zeroext i16 @test2(i32 %address) nounwind {
+entry:
+; CHECK-LABEL: test2:
+; CHECK: movw	%gs:(%eax), %ax
+  %asmtmp = tail call i16 asm "movw\09%gs:${1:a}, ${0:w}", "=r,ir,~{dirflag},~{fpsr},~{flags}"(i32 %address) nounwind ; <i16> [#uses=1]
+  ret i16 %asmtmp
+}
+
+@n = global i32 42                                ; <ptr> [#uses=3]
+@y = common global i32 0                          ; <ptr> [#uses=3]
+
+define void @test3() nounwind {
+entry:
+; CHECK-LABEL: test3:
+; CHECK: movl _n, %eax
+  call void asm sideeffect "movl ${0:a}, %eax", "ir,~{dirflag},~{fpsr},~{flags},~{eax}"(ptr @n) nounwind
+  ret void
+}
+
+define void @test4() nounwind {
+entry:
+; CHECK-LABEL: test4:
+; CHECK: movl	L_y$non_lazy_ptr, %ecx
+; CHECK: movl (%ecx), %eax
+  call void asm sideeffect "movl ${0:a}, %eax", "ir,~{dirflag},~{fpsr},~{flags},~{eax}"(ptr @y) nounwind
+  ret void
+}

llvm/test/CodeGen/X86/asm-modifier.ll

@@ -1,41 +1,64 @@
-; RUN: llc < %s | FileCheck %s
-; ModuleID = 'asm.c'
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-target triple = "i386-apple-darwin9.6"
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -mtriple=i686 < %s | FileCheck %s --check-prefixes=CHECK,32
+; RUN: llc -mtriple=x86_64 < %s | FileCheck %s --check-prefixes=CHECK,64
 
-define i32 @test1() nounwind {
-entry:
-; CHECK-LABEL: test1:
-; CHECK: movw	%gs:6, %ax
-  %asmtmp.i = tail call i16 asm "movw\09%gs:${1:a}, ${0:w}", "=r,ir,~{dirflag},~{fpsr},~{flags}"(i32 6) nounwind ; <i16> [#uses=1]
-  %0 = zext i16 %asmtmp.i to i32                  ; <i32> [#uses=1]
-  ret i32 %0
-}
+@var = internal global i32 0, align 4
 
-define zeroext i16 @test2(i32 %address) nounwind {
-entry:
-; CHECK-LABEL: test2:
-; CHECK: movw	%gs:(%eax), %ax
-  %asmtmp = tail call i16 asm "movw\09%gs:${1:a}, ${0:w}", "=r,ir,~{dirflag},~{fpsr},~{flags}"(i32 %address) nounwind ; <i16> [#uses=1]
-  ret i16 %asmtmp
+define dso_local void @test_c() nounwind {
+; CHECK-LABEL: test_c:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    #TEST 42
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    #TEST var
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:    ret{{[l|q]}}
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(i32 42)
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(ptr nonnull @var)
+  ret void
 }
 
-@n = global i32 42                                ; <ptr> [#uses=3]
-@y = common global i32 0                          ; <ptr> [#uses=3]
+define dso_local void @test_n() nounwind {
+; CHECK-LABEL: test_n:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    #TEST 37
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:    ret{{[l|q]}}
+  tail call void asm sideeffect "#TEST ${0:n}", "i"(i32 -37)
+  ret void
+}
 
-define void @test3() nounwind {
+define void @test_q() {
+; CHECK-LABEL: test_q:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    #TEST 0
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:    ret{{[l|q]}}
 entry:
-; CHECK-LABEL: test3:
-; CHECK: movl _n, %eax
-  call void asm sideeffect "movl ${0:a}, %eax", "ir,~{dirflag},~{fpsr},~{flags},~{eax}"(ptr @n) nounwind
+  call void asm sideeffect "#TEST ${0:q}", "=*imr"( ptr elementtype( i64) null )
   ret void
 }
 
-define void @test4() nounwind {
+define void @test_V(ptr %p) {
+; 32-LABEL: test_V:
+; 32:       # %bb.0: # %entry
+; 32-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; 32-NEXT:    #APP
+; 32-NEXT:    calll __x86_indirect_thunk_eax
+; 32-NEXT:    #NO_APP
+; 32-NEXT:    retl
+;
+; 64-LABEL: test_V:
+; 64:       # %bb.0: # %entry
+; 64-NEXT:    #APP
+; 64-NEXT:    callq __x86_indirect_thunk_rdi
+; 64-NEXT:    #NO_APP
+; 64-NEXT:    retq
 entry:
-; CHECK-LABEL: test4:
-; CHECK: movl	L_y$non_lazy_ptr, %ecx
-; CHECK: movl (%ecx), %eax
-  call void asm sideeffect "movl ${0:a}, %eax", "ir,~{dirflag},~{fpsr},~{flags},~{eax}"(ptr @y) nounwind
+  tail call void asm sideeffect "call __x86_indirect_thunk_${0:V}", "r,~{dirflag},~{fpsr},~{flags}"(ptr %p)
   ret void
 }
+