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sync with SVF
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@jumormt
jumormt committed Feb 5, 2024
1 parent febd93d commit 261aeef
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2 changes: 1 addition & 1 deletion .vscode/c_cpp_properties.json
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@
"/usr/local/include/**",
"/home/SVF-tools/SVF/**",
"${workspaceFolder}/**",
"/home/SVF-tools/SVF/llvm-14.0.0.obj/**"
"/home/SVF-tools/SVF/llvm-16.0.0.obj/**"
],
"defines": [],
"compilerPath": "/usr/bin/g++",
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2 changes: 1 addition & 1 deletion .vscode/tasks.json
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Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
"label": "C/C++: cpp build active file",
"type": "shell",
// if you run SVF-Teaching not in docker container, you need to change the LLVM_DIR and SVF_DIR
"command": "cmake -g -DCMAKE_BUILD_TYPE=Debug -DSVF_DIR=/home/SVF-tools/SVF -DLLVM_DIR=/home/SVF-tools/SVF/llvm-14.0.0.obj -DZ3_DIR=/home/SVF-tools/SVF/z3.obj . && make",
"command": "cmake -g -DCMAKE_BUILD_TYPE=Debug -DSVF_DIR=/home/SVF-tools/SVF -DLLVM_DIR=/home/SVF-tools/SVF/llvm-16.0.0.obj -DZ3_DIR=/home/SVF-tools/SVF/z3.obj . && make",
"options": {
"cwd": "${workspaceFolder}"
},
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32 changes: 17 additions & 15 deletions Assignment-2/testcase/bc/test1.ll
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Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
; ModuleID = '../bc/test1.ll'
; ModuleID = 'test1.ll'
source_filename = "test1.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: noinline nounwind uwtable
define dso_local void @source(i32* %s) #0 {
define dso_local void @source(ptr noundef %s) #0 {
entry:
call void @sink()
ret void
Expand All @@ -20,33 +20,35 @@ entry:
define dso_local i32 @main() #0 {
entry:
%a = alloca i32, align 4
store i32 1, i32* %a, align 4
store i32 1, ptr %a, align 4
br label %while.cond

while.cond: ; preds = %while.body, %entry
%0 = load i32, i32* %a, align 4
%0 = load i32, ptr %a, align 4
%cmp = icmp sle i32 %0, 1
br i1 %cmp, label %while.body, label %while.end

while.body: ; preds = %while.cond
call void @source(i32* %a)
%1 = load i32, i32* %a, align 4
call void @source(ptr noundef %a)
%1 = load i32, ptr %a, align 4
%inc = add nsw i32 %1, 1
store i32 %inc, i32* %a, align 4
br label %while.cond, !llvm.loop !4
store i32 %inc, ptr %a, align 4
br label %while.cond, !llvm.loop !6

while.end: ; preds = %while.cond
ret i32 0
}

attributes #0 = { noinline nounwind uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2}
!llvm.ident = !{!3}
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 7, !"uwtable", i32 1}
!2 = !{i32 7, !"frame-pointer", i32 2}
!3 = !{!"clang version 14.0.0"}
!4 = distinct !{!4, !5}
!5 = !{!"llvm.loop.mustprogress"}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{i32 7, !"frame-pointer", i32 2}
!5 = !{!"clang version 16.0.0"}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
28 changes: 15 additions & 13 deletions Assignment-2/testcase/bc/test2.ll
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Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
; ModuleID = '../bc/test2.ll'
; ModuleID = 'test2.ll'
source_filename = "test2.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: noinline nounwind uwtable
define dso_local i32 @bar(i32 %s) #0 {
define dso_local i32 @bar(i32 noundef %s) #0 {
entry:
ret i32 %s
}
Expand All @@ -17,30 +17,32 @@ entry:
br i1 %cmp, label %if.then, label %if.else

if.then: ; preds = %entry
%call1 = call i32 @bar(i32 %call)
call void @sink(i32 %call1)
%call1 = call i32 @bar(i32 noundef %call)
call void @sink(i32 noundef %call1)
br label %if.end

if.else: ; preds = %entry
%call2 = call i32 @bar(i32 %call)
call void @sink(i32 %call2)
%call2 = call i32 @bar(i32 noundef %call)
call void @sink(i32 noundef %call2)
br label %if.end

if.end: ; preds = %if.else, %if.then
ret i32 0
}

declare dso_local i32 @source(...) #1
declare i32 @source(...) #1

declare dso_local void @sink(i32) #1
declare void @sink(i32 noundef) #1

attributes #0 = { noinline nounwind uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2}
!llvm.ident = !{!3}
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 7, !"uwtable", i32 1}
!2 = !{i32 7, !"frame-pointer", i32 2}
!3 = !{!"clang version 14.0.0"}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{i32 7, !"frame-pointer", i32 2}
!5 = !{!"clang version 16.0.0"}
98 changes: 49 additions & 49 deletions Assignment-2/testcase/dot/test1.ll.icfg.dot
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Original file line number Diff line number Diff line change
@@ -1,52 +1,52 @@
digraph "ICFG" {
label="ICFG";

Node0x5593c9c16ff0 [shape=record,color=black,label="{IntraICFGNode23 \{fun: main\}\nBranchStmt: [ Unconditional branch]\nSuccessor 0 ICFGNode13 \n br label %while.cond, !llvm.loop !4 }"];
Node0x5593c9c16ff0 -> Node0x5593c9c15cc0[style=solid];
Node0x5593c9c16e10 [shape=record,color=black,label="{IntraICFGNode22 \{fun: main\}\nStoreStmt: [Var17 \<-- Var28] \n store i32 %inc, i32* %a, align 4 }"];
Node0x5593c9c16e10 -> Node0x5593c9c16ff0[style=solid];
Node0x5593c9c16c30 [shape=record,color=black,label="{IntraICFGNode21 \{fun: main\}\nBinaryOPStmt: [Var28 \<-- (Var27 opcode13 Var20)] \n %inc = add nsw i32 %1, 1 }"];
Node0x5593c9c16c30 -> Node0x5593c9c16e10[style=solid];
Node0x5593c9c16a60 [shape=record,color=green,label="{FunExitICFGNode20 \{fun: main\}\nPhiStmt: [Var16 \<-- ([Var32, ICFGNode18],)] \n ret i32 0 }"];
Node0x5593c9c16880 [shape=record,color=black,label="{IntraICFGNode19 \{fun: main\}\nLoadStmt: [Var27 \<-- Var17] \n %1 = load i32, i32* %a, align 4 }"];
Node0x5593c9c16880 -> Node0x5593c9c16c30[style=solid];
Node0x5593c9c166a0 [shape=record,color=black,label="{IntraICFGNode18 \{fun: main\}\n ret i32 0 }"];
Node0x5593c9c166a0 -> Node0x5593c9c16a60[style=solid];
Node0x5593c9c163d0 [shape=record,color=blue,label="{RetICFGNode17 \{fun: main\}}"];
Node0x5593c9c163d0 -> Node0x5593c9c16880[style=solid];
Node0x5593c9c01c20 [shape=record,color=red,label="{CallICFGNode16 \{fun: main\}\nCallPE: [Var7 \<-- Var17] \n call void @source(i32* %a) |{<s0>0x5593c9c05110}}"];
Node0x5593c9c01c20:s0 -> Node0x5593c9c05f90[style=solid,color=red];
Node0x5593c9c16170 [shape=record,color=black,label="{IntraICFGNode15 \{fun: main\}\nBranchStmt: [Condition Var24]\nSuccessor 0 ICFGNode16 Successor 1 ICFGNode18 \n br i1 %cmp, label %while.body, label %while.end }"];
Node0x5593c9c16170 -> Node0x5593c9c01c20[style=solid];
Node0x5593c9c16170 -> Node0x5593c9c166a0[style=solid];
Node0x5593c9c15f90 [shape=record,color=black,label="{IntraICFGNode14 \{fun: main\}\nCmpStmt: [Var24 \<-- (Var23 predicate41 Var20)] \n %cmp = icmp sle i32 %0, 1 }"];
Node0x5593c9c15f90 -> Node0x5593c9c16170[style=solid];
Node0x5593c9c15cc0 [shape=record,color=black,label="{IntraICFGNode13 \{fun: main\}\nLoadStmt: [Var23 \<-- Var17] \n %0 = load i32, i32* %a, align 4 }"];
Node0x5593c9c15cc0 -> Node0x5593c9c15f90[style=solid];
Node0x5593c9bffb50 [shape=record,color=purple,label="{GlobalICFGNode0\nCopyStmt: [Var1 \<-- Var0] \n i8* null \{ constant data \}\nAddrStmt: [Var20 \<-- Var3] \n i32 1 \{ constant data \}\nAddrStmt: [Var32 \<-- Var3] \n i32 0 \{ constant data \}\nAddrStmt: [Var4 \<-- Var5] \n source \nAddrStmt: [Var9 \<-- Var10] \n sink \nAddrStmt: [Var14 \<-- Var15] \n main }"];
Node0x5593c9bffb50 -> Node0x5593c9c15630[style=solid];
Node0x5593c9c05f90 [shape=record,color=yellow,label="{FunEntryICFGNode1 \{fun: source\}}"];
Node0x5593c9c05f90 -> Node0x5593c9c00530[style=solid];
Node0x5593c9c00530 [shape=record,color=red,label="{CallICFGNode2 \{fun: source\}|{<s0>0x5593c9c03f60}}"];
Node0x5593c9c00530:s0 -> Node0x5593c9c14e60[style=solid,color=red];
Node0x5593c9c14d20 [shape=record,color=blue,label="{RetICFGNode3 \{fun: source\}}"];
Node0x5593c9c14d20 -> Node0x5593c9c151f0[style=solid];
Node0x5593c9c14e60 [shape=record,color=yellow,label="{FunEntryICFGNode4 \{fun: sink\}}"];
Node0x5593c9c14e60 -> Node0x5593c9c15490[style=solid];
Node0x5593c9c14f30 [shape=record,color=green,label="{FunExitICFGNode5 \{fun: sink\}|{<s0>0x5593c9c03f60}}"];
Node0x5593c9c14f30:s0 -> Node0x5593c9c14d20[style=solid,color=blue];
Node0x5593c9c151f0 [shape=record,color=black,label="{IntraICFGNode6 \{fun: source\}\n ret void }"];
Node0x5593c9c151f0 -> Node0x5593c9c15380[style=solid];
Node0x5593c9c15380 [shape=record,color=green,label="{FunExitICFGNode7 \{fun: source\}|{<s0>0x5593c9c05110}}"];
Node0x5593c9c15380:s0 -> Node0x5593c9c163d0[style=solid,color=blue];
Node0x5593c9c15490 [shape=record,color=black,label="{IntraICFGNode8 \{fun: sink\}\n ret void }"];
Node0x5593c9c15490 -> Node0x5593c9c14f30[style=solid];
Node0x5593c9c15630 [shape=record,color=yellow,label="{FunEntryICFGNode9 \{fun: main\}}"];
Node0x5593c9c15630 -> Node0x5593c9c15760[style=solid];
Node0x5593c9c15760 [shape=record,color=black,label="{IntraICFGNode10 \{fun: main\}\nAddrStmt: [Var17 \<-- Var18] \n %a = alloca i32, align 4 }"];
Node0x5593c9c15760 -> Node0x5593c9c15920[style=solid];
Node0x5593c9c15920 [shape=record,color=black,label="{IntraICFGNode11 \{fun: main\}\nStoreStmt: [Var17 \<-- Var20] \n store i32 1, i32* %a, align 4 }"];
Node0x5593c9c15920 -> Node0x5593c9c15ae0[style=solid];
Node0x5593c9c15ae0 [shape=record,color=black,label="{IntraICFGNode12 \{fun: main\}\nBranchStmt: [ Unconditional branch]\nSuccessor 0 ICFGNode13 \n br label %while.cond }"];
Node0x5593c9c15ae0 -> Node0x5593c9c15cc0[style=solid];
}
Node0x1ad97f0 [shape=record,color=purple,label="{GlobalICFGNode0\nCopyStmt: [Var1 \<-- Var0] \n ptr null \{ constant data \}\nAddrStmt: [Var32 \<-- Var3] \n i32 0 \{ constant data \}\nAddrStmt: [Var19 \<-- Var3] \n i32 1 \{ constant data \}\nAddrStmt: [Var4 \<-- Var5] \nFunction: source \nAddrStmt: [Var9 \<-- Var10] \nFunction: sink \nAddrStmt: [Var14 \<-- Var15] \nFunction: main }"];
Node0x1ad97f0 -> Node0x1a52f60[style=solid];
Node0x1a623c0 [shape=record,color=yellow,label="{FunEntryICFGNode1 \{fun: source\}}"];
Node0x1a623c0 -> Node0x1a65c80[style=solid];
Node0x1a65c80 [shape=record,color=red,label="{CallICFGNode2 \{fun: source\}|{<s0>0x1ad91a0}}"];
Node0x1a65c80:s0 -> Node0x1a58b10[style=solid,color=red];
Node0x1a60360 [shape=record,color=blue,label="{RetICFGNode3 \{fun: source\}}"];
Node0x1a60360 -> Node0x1acb6c0[style=solid];
Node0x1a58b10 [shape=record,color=yellow,label="{FunEntryICFGNode4 \{fun: sink\}}"];
Node0x1a58b10 -> Node0x1aeae20[style=solid];
Node0x1ad9d60 [shape=record,color=green,label="{FunExitICFGNode5 \{fun: sink\}|{<s0>0x1ad91a0}}"];
Node0x1ad9d60:s0 -> Node0x1a60360[style=solid,color=blue];
Node0x1acb6c0 [shape=record,color=black,label="{IntraICFGNode6 \{fun: source\}\n ret void }"];
Node0x1acb6c0 -> Node0x1aa1d20[style=solid];
Node0x1aa1d20 [shape=record,color=green,label="{FunExitICFGNode7 \{fun: source\}|{<s0>0x1aeb5d0}}"];
Node0x1aa1d20:s0 -> Node0x1a7a650[style=solid,color=blue];
Node0x1aeae20 [shape=record,color=black,label="{IntraICFGNode8 \{fun: sink\}\n ret void }"];
Node0x1aeae20 -> Node0x1ad9d60[style=solid];
Node0x1a52f60 [shape=record,color=yellow,label="{FunEntryICFGNode9 \{fun: main\}}"];
Node0x1a52f60 -> Node0x1a9d210[style=solid];
Node0x1a9d210 [shape=record,color=black,label="{IntraICFGNode10 \{fun: main\}\nAddrStmt: [Var17 \<-- Var18] \n %a = alloca i32, align 4 }"];
Node0x1a9d210 -> Node0x1a70370[style=solid];
Node0x1a70370 [shape=record,color=black,label="{IntraICFGNode11 \{fun: main\}\nStoreStmt: [Var17 \<-- Var19] \n store i32 1, ptr %a, align 4 }"];
Node0x1a70370 -> Node0x1a56230[style=solid];
Node0x1a56230 [shape=record,color=black,label="{IntraICFGNode12 \{fun: main\}\nBranchStmt: [ Unconditional branch]\nSuccessor 0 ICFGNode13 \n br label %while.cond }"];
Node0x1a56230 -> Node0x1a73420[style=solid];
Node0x1a73420 [shape=record,color=black,label="{IntraICFGNode13 \{fun: main\}\nLoadStmt: [Var23 \<-- Var17] \n %0 = load i32, ptr %a, align 4 }"];
Node0x1a73420 -> Node0x1ad4db0[style=solid];
Node0x1ad4db0 [shape=record,color=black,label="{IntraICFGNode14 \{fun: main\}\nCmpStmt: [Var24 \<-- (Var23 predicate41 Var19)] \n %cmp = icmp sle i32 %0, 1 }"];
Node0x1ad4db0 -> Node0x1ae28a0[style=solid];
Node0x1ae28a0 [shape=record,color=black,label="{IntraICFGNode15 \{fun: main\}\nBranchStmt: [Condition Var24]\nSuccessor 0 ICFGNode16 Successor 1 ICFGNode18 \n br i1 %cmp, label %while.body, label %while.end }"];
Node0x1ae28a0 -> Node0x1a992d0[style=solid];
Node0x1ae28a0 -> Node0x1ad4010[style=solid];
Node0x1a992d0 [shape=record,color=red,label="{CallICFGNode16 \{fun: main\}\nCallPE: [Var7 \<-- Var17] \n call void @source(ptr noundef %a) |{<s0>0x1aeb5d0}}"];
Node0x1a992d0:s0 -> Node0x1a623c0[style=solid,color=red];
Node0x1a7a650 [shape=record,color=blue,label="{RetICFGNode17 \{fun: main\}}"];
Node0x1a7a650 -> Node0x1ae4680[style=solid];
Node0x1ad4010 [shape=record,color=black,label="{IntraICFGNode18 \{fun: main\}\n ret i32 0 }"];
Node0x1ad4010 -> Node0x1a85d20[style=solid];
Node0x1ae4680 [shape=record,color=black,label="{IntraICFGNode19 \{fun: main\}\nLoadStmt: [Var27 \<-- Var17] \n %1 = load i32, ptr %a, align 4 }"];
Node0x1ae4680 -> Node0x1a85620[style=solid];
Node0x1a85d20 [shape=record,color=green,label="{FunExitICFGNode20 \{fun: main\}\nPhiStmt: [Var16 \<-- ([Var32, ICFGNode18],)] \n ret i32 0 }"];
Node0x1a85620 [shape=record,color=black,label="{IntraICFGNode21 \{fun: main\}\nBinaryOPStmt: [Var28 \<-- (Var27 opcode13 Var19)] \n %inc = add nsw i32 %1, 1 }"];
Node0x1a85620 -> Node0x1ae2040[style=solid];
Node0x1ae2040 [shape=record,color=black,label="{IntraICFGNode22 \{fun: main\}\nStoreStmt: [Var17 \<-- Var28] \n store i32 %inc, ptr %a, align 4 }"];
Node0x1ae2040 -> Node0x1a6a460[style=solid];
Node0x1a6a460 [shape=record,color=black,label="{IntraICFGNode23 \{fun: main\}\nBranchStmt: [ Unconditional branch]\nSuccessor 0 ICFGNode13 \n br label %while.cond, !llvm.loop !6 }"];
Node0x1a6a460 -> Node0x1a73420[style=solid];
}
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