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Sorting Registers in PE test-01 for print alignment (ARM-software#374)
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Change-Id: If5bc9e734c66a9520a1e260e3bd344c5898384ce

Signed-off-by: Ajayswar S <ajayswar.s@arm.com>
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@ajayswar-s
ajayswar-s authored Oct 25, 2024
1 parent 1fdeb0f commit c9bbb55
Showing 1 changed file with 32 additions and 32 deletions.
64 changes: 32 additions & 32 deletions test_pool/pe/operating_system/test_os_c001.c
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Original file line number Diff line number Diff line change
Expand Up @@ -59,43 +59,43 @@ typedef struct{
pe_reg_info *g_pe_reg_info;

reg_details reg_list[] = {
{CCSIDR_EL1, MASK_CCSIDR_LS, "CCSIDR_EL1", 0x0 },
{MIDR_EL1, MASK_MIDR, "MIDR_EL1", 0x0 },
{ID_AA64PFR0_EL1, 0x0, "ID_AA64PFR0_EL1" , 0x0 },
{ID_AA64PFR1_EL1, 0x0, "ID_AA64PFR1_EL1" , 0x0 },
{ID_AA64DFR0_EL1, 0x0, "ID_AA64DFR0_EL1" , 0x0 },
{ID_AA64DFR1_EL1, 0x0, "ID_AA64DFR1_EL1" , 0x0 },
{CCSIDR_EL1, MASK_CCSIDR_LS, "CCSIDR_EL1 ", 0x0 },
{MIDR_EL1, MASK_MIDR, "MIDR_EL1 ", 0x0 },
{MPIDR_EL1, MASK_MPIDR, "MPIDR_EL1 ", 0x0 },
{CTR_EL0, MASK_CTR, "CTR_EL0 ", 0x0 },
{ID_AA64PFR0_EL1, 0x0, "ID_AA64PFR0_EL1 ", 0x0 },
{ID_AA64PFR1_EL1, 0x0, "ID_AA64PFR1_EL1 ", 0x0 },
{ID_AA64DFR0_EL1, 0x0, "ID_AA64DFR0_EL1 ", 0x0 },
{ID_AA64DFR1_EL1, 0x0, "ID_AA64DFR1_EL1 ", 0x0 },
{ID_AA64MMFR0_EL1, MASK_AA64MMFR0, "ID_AA64MMFR0_EL1", 0x0 },
{ID_AA64MMFR1_EL1, 0x0, "ID_AA64MMFR1_EL1", 0x0 },
{ID_AA64MMFR2_EL1, 0x0, "ID_AA64MMFR2_EL1", 0x0 },
{CTR_EL0, MASK_CTR, "CTR_EL0" , 0x0 },
{ID_AA64ISAR0_EL1, 0x0, "ID_AA64ISAR0_EL1", 0x0 },
{ID_AA64ISAR1_EL1, 0x0, "ID_AA64ISAR1_EL1", 0x0 },
{MPIDR_EL1, MASK_MPIDR, "MPIDR_EL1" , 0x0 },
{ID_DFR0_EL1, 0x0, "ID_DFR0_EL1" , AA32},
{ID_ISAR0_EL1, 0x0, "ID_ISAR0_EL1" , AA32},
{ID_ISAR1_EL1, 0x0, "ID_ISAR1_EL1" , AA32},
{ID_ISAR2_EL1, 0x0, "ID_ISAR2_EL1" , AA32},
{ID_ISAR3_EL1, 0x0, "ID_ISAR3_EL1" , AA32},
{ID_ISAR4_EL1, 0x0, "ID_ISAR4_EL1" , AA32},
{ID_ISAR5_EL1, 0x0, "ID_ISAR5_EL1" , AA32},
{ID_MMFR0_EL1, 0x0, "ID_MMFR0_EL1" , AA32},
{ID_MMFR1_EL1, 0x0, "ID_MMFR1_EL1" , AA32},
{ID_MMFR2_EL1, 0x0, "ID_MMFR2_EL1" , AA32},
{ID_MMFR3_EL1, 0x0, "ID_MMFR3_EL1" , AA32},
{ID_MMFR4_EL1, 0x0, "ID_MMFR4_EL1" , AA32},
{ID_PFR0_EL1, 0x0, "ID_PFR0_EL1" , AA32},
{ID_PFR1_EL1, 0x0, "ID_PFR1_EL1" , AA32},
{MVFR0_EL1, 0x0, "MVFR0_EL1" , AA32},
{MVFR1_EL1, 0x0, "MVFR1_EL1" , AA32},
{MVFR2_EL1, 0x0, "MVFR2_EL1" , AA32},
{PMCEID0_EL0, 0x0, "PMCEID0_EL0", PMUV3},
{PMCEID1_EL0, 0x0, "PMCEID1_EL0", PMUV3},
{PMCR_EL0, 0x0, "PMCR_EL0", PMUV3},
{PMBIDR_EL1, 0x0, "PMBIDR_EL1" , SPE },
{PMSIDR_EL1, 0x0, "PMSIDR_EL1" , SPE },
{ERRIDR_EL1, 0x0, "ERRIDR_EL1" , RAS },
{LORID_EL1, 0x0, "LORID_EL1" , LOR }
{PMCEID0_EL0, 0x0, "PMCEID0_EL0 ", PMUV3},
{PMCEID1_EL0, 0x0, "PMCEID1_EL0 ", PMUV3},
{PMCR_EL0, 0x0, "PMCR_EL0 ", PMUV3},
{PMBIDR_EL1, 0x0, "PMBIDR_EL1 ", SPE },
{PMSIDR_EL1, 0x0, "PMSIDR_EL1 ", SPE },
{ERRIDR_EL1, 0x0, "ERRIDR_EL1 ", RAS },
{LORID_EL1, 0x0, "LORID_EL1 ", LOR },
{ID_DFR0_EL1, 0x0, "ID_DFR0_EL1 ", AA32},
{ID_ISAR0_EL1, 0x0, "ID_ISAR0_EL1 ", AA32},
{ID_ISAR1_EL1, 0x0, "ID_ISAR1_EL1 ", AA32},
{ID_ISAR2_EL1, 0x0, "ID_ISAR2_EL1 ", AA32},
{ID_ISAR3_EL1, 0x0, "ID_ISAR3_EL1 ", AA32},
{ID_ISAR4_EL1, 0x0, "ID_ISAR4_EL1 ", AA32},
{ID_ISAR5_EL1, 0x0, "ID_ISAR5_EL1 ", AA32},
{ID_MMFR0_EL1, 0x0, "ID_MMFR0_EL1 ", AA32},
{ID_MMFR1_EL1, 0x0, "ID_MMFR1_EL1 ", AA32},
{ID_MMFR2_EL1, 0x0, "ID_MMFR2_EL1 ", AA32},
{ID_MMFR3_EL1, 0x0, "ID_MMFR3_EL1 ", AA32},
{ID_MMFR4_EL1, 0x0, "ID_MMFR4_EL1 ", AA32},
{ID_PFR0_EL1, 0x0, "ID_PFR0_EL1 ", AA32},
{ID_PFR1_EL1, 0x0, "ID_PFR1_EL1 ", AA32},
{MVFR0_EL1, 0x0, "MVFR0_EL1 ", AA32},
{MVFR1_EL1, 0x0, "MVFR1_EL1 ", AA32},
{MVFR2_EL1, 0x0, "MVFR2_EL1 ", AA32}
};

uint64_t
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