Fix for issue ARM-software#262: Removing test 840 as it is removed fr…

…om Spec - The spec is updated to remove this from BSA and now part of SBSA specification Signed-off-by: Gowtham Siddarth <gowtham.siddarth@arm.com>
Sujana-M · May 28, 2024 · de27d76 · de27d76
1 parent 23433ca
commit de27d76
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Showing 7 changed files with 6 additions and 85 deletions.
diff --git a/docs/arm_bsa_testcase_checklist.rst b/docs/arm_bsa_testcase_checklist.rst
@@ -198,8 +198,6 @@ The below table provides the following details
 +-------+--------------------------------------------+------------------------------------------------------------+-----+-----+-----+-----+----------+-----+-------------------+
 |839    |Check MSI support for PCIe dev              |PCI_MSI_01                                                  |Yes  |Yes  |Yes  |Yes  |Yes       |No   |No                 |
 +-------+--------------------------------------------+------------------------------------------------------------+-----+-----+-----+-----+----------+-----+-------------------+
-|840    |PCIe RC,PE - Same Inr Shareable Domain      |PCI_IC_11                                                   |Yes  |Yes  |Yes  |Yes  |Yes       |No   |No                 |
-+-------+--------------------------------------------+------------------------------------------------------------+-----+-----+-----+-----+----------+-----+-------------------+
 |842    |PASID support atleast 16 bits               |PCI_PAS_1                                                   |Yes  |Yes  |Yes  |Yes  |Yes       |No   |No                 |
 +-------+--------------------------------------------+------------------------------------------------------------+-----+-----+-----+-----+----------+-----+-------------------+
 |861    |PCIe Unaligned access                       |PCI_MM_01, PCI_MM_02, PCI_MM_03                             |Yes  |Yes  |Yes  |Yes# |Yes       |Yes  |No                 |

diff --git a/test_pool/pcie/operating_system/test_os_p040.c b/test_pool/pcie/operating_system/test_os_p040.c
diff --git a/uefi_app/BsaAcs.inf b/uefi_app/BsaAcs.inf
@@ -103,7 +103,6 @@
   ../test_pool/pcie/operating_system/test_os_p037.c
   ../test_pool/pcie/operating_system/test_os_p038.c
   ../test_pool/pcie/operating_system/test_os_p039.c
-  ../test_pool/pcie/operating_system/test_os_p040.c
   ../test_pool/pcie/operating_system/test_os_p042.c
   ../test_pool/smmu/operating_system/test_os_i001.c
   ../test_pool/smmu/operating_system/test_os_i002.c

diff --git a/uefi_app/BsaAcsMem.inf b/uefi_app/BsaAcsMem.inf
@@ -103,7 +103,6 @@
   ../test_pool/pcie/operating_system/test_os_p037.c
   ../test_pool/pcie/operating_system/test_os_p038.c
   ../test_pool/pcie/operating_system/test_os_p039.c
-  ../test_pool/pcie/operating_system/test_os_p040.c
   ../test_pool/pcie/operating_system/test_os_p042.c
   ../test_pool/smmu/operating_system/test_os_i001.c
   ../test_pool/smmu/operating_system/test_os_i002.c

diff --git a/val/bsa/include/bsa_acs_pcie.h b/val/bsa/include/bsa_acs_pcie.h
@@ -67,7 +67,6 @@ uint32_t os_p036_entry(uint32_t num_pe);
 uint32_t os_p037_entry(uint32_t num_pe);
 uint32_t os_p038_entry(uint32_t num_pe);
 uint32_t os_p039_entry(uint32_t num_pe);
-uint32_t os_p040_entry(uint32_t num_pe);
 uint32_t os_p041_entry(uint32_t num_pe);
 uint32_t os_p042_entry(uint32_t num_pe);
 

diff --git a/val/bsa/src/bsa_execute_test.c b/val/bsa/src/bsa_execute_test.c
@@ -428,7 +428,6 @@ val_bsa_pcie_execute_tests(uint32_t num_pe, uint32_t *g_sw_view)
       status |= os_p037_entry(num_pe);
       status |= os_p038_entry(num_pe);
       status |= os_p039_entry(num_pe);
-      status |= os_p040_entry(num_pe);
       status |= os_p042_entry(num_pe);
 
 #endif

diff --git a/val/sbsa/src/sbsa_execute_test.c b/val/sbsa/src/sbsa_execute_test.c
@@ -281,9 +281,12 @@ val_sbsa_pcie_execute_tests(uint32_t level, uint32_t num_pe)
   #endif
 
   #ifndef TARGET_LINUX
-  if (((level > 3) && (g_sbsa_only_level == 0)) || (g_sbsa_only_level == 4)) {
-  /* Only the test p062 will be run at L4+ with the test number (ACS_PER_TEST_NUM_BASE + 1) */
-    status = p062_entry(num_pe);
+    if (((level > 2) && (g_sbsa_only_level == 0)) || (g_sbsa_only_level == 3))
+      status |= p040_entry(num_pe);
+
+    if (((level > 3) && (g_sbsa_only_level == 0)) || (g_sbsa_only_level == 4)) {
+    /* Only the test p062 will be run at L4+ with the test number (ACS_PER_TEST_NUM_BASE + 1) */
+      status = p062_entry(num_pe);
   }
   #endif