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Merge pull request #8 from optimsoc/simlib
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Relocate simulation build scripts
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wallento committed Feb 24, 2016
2 parents 91a23b6 + e7c2e2c commit d71b753
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Showing 6 changed files with 13 additions and 4 deletions.
3 changes: 2 additions & 1 deletion src/host/sim/optimsoc-sim.pc.in
Original file line number Diff line number Diff line change
@@ -1,7 +1,8 @@
prefix=@prefix@
libdir=@libdir@
includedir=@includedir@
includedir=@includedir@/optimsoc-sim
datadir=@datadir@
buildtools=@datadir@/optimsoc-sim

Name: OpTiMSoC Simulation library
Description: OpTiMSoC simulation library
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6 changes: 5 additions & 1 deletion src/host/sim/src/Makefile.am
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Expand Up @@ -23,7 +23,7 @@

lib_LTLIBRARIES = liboptimsocsim.la

liboptimsocsim_ladir = $(includedir)
liboptimsocsim_ladir = $(includedir)/optimsoc-sim

liboptimsocsim_la_SOURCES =\
OptionsParser.cpp \
Expand All @@ -36,3 +36,7 @@ liboptimsocsim_la_HEADERS =\

liboptimsocsim_la_LDFLAGS = $(AM_LDFLAGS) $(LTLDFLAGS)
liboptimsocsim_la_CPPFLAGS = $(AM_CPPFLAGS) $(verilator_CFLAGS)

makefilesdir = $(datadir)/optimsoc-sim
makefiles_DATA = share/Makefile.verilator.inc

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4 changes: 3 additions & 1 deletion tbench/dm/compute_tile/Makefile
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Expand Up @@ -4,4 +4,6 @@ all:

TBENCH=tb_compute_tile

include ../../Makefile.verilator.inc
buildtools=$(shell pkg-config --variable=buildtools optimsoc-sim)

include $(buildtools)/Makefile.verilator.inc
4 changes: 3 additions & 1 deletion tbench/dm/system_2x2_cccc/Makefile
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Expand Up @@ -5,4 +5,6 @@ all:
TBENCH=tb_system_2x2_cccc
TBENCH_CFLAGS?=-DNUMCORES=4

include ../../Makefile.verilator.inc
buildtools=$(shell pkg-config --variable=buildtools optimsoc-sim)

include $(buildtools)/Makefile.verilator.inc

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