New branch to finish organizing and testing the new power model imple…

…mentation.

The power model will now use a SimObject interface named hw_interface as the
central interface for all power/area/performance/statistics that are generated
by gem5-SALAM. This commit has some structures in place but likely will undergo
major changes for the next few revisions as all the current versions of the
hardware model are combined and merged here.


Signed-off-by: Josh Slycord <jslycord@uncc.edu>

src/hwacc/ComputeUnit.py

@@ -3,10 +3,14 @@
 from m5.SimObject import SimObject
 from CommInterface import CommInterface
 from CycleCounts import CycleCounts
+#from HWInterface import HWInterface
 
 class ComputeUnit(SimObject):
     type = 'ComputeUnit'
     cxx_header = "hwacc/compute_unit.hh"
 
     comm_int = Param.CommInterface(Parent.any, "Communication interface to connect to")
-    cycles = Param.CycleCounts(Parent.any, "Load cycle count config")
+    cycles = Param.CycleCounts(Parent.any, "Load instruction runtime cycles")
+
+    #comm_int = Param.CommInterface(Parent.any, "Communication interface to connect to")
+    #hw_int = Param.HWInterface(Parent.any, "Hardware interface to connect to")

src/hwacc/CycleCounts.py

@@ -2,11 +2,15 @@
 from m5.proxy import *
 from m5.SimObject import SimObject
 
-#Cycle Counts
+#Instruction runtime cycles
 class CycleCounts(SimObject):
+    # SimObject type
     type = "CycleCounts"
-    cxx_header = "hwacc/LLVMRead/src/cycle_count.hh"
+
+    # gem5-SALAM attached header
+    cxx_header = "hwacc/LLVMRead/src/cycle_counts.hh"
 
+    # Instruction cycle count defaults
     counter = Param.UInt32(1, "Counter intructions runtime cycles.")
     gep = Param.UInt32(1, "GetElementPtr intructions runtime cycles.")
     phi = Param.UInt32(1, "Phi intructions runtime cycles.")
@@ -28,6 +32,7 @@ class CycleCounts(SimObject):
     fptoui = Param.UInt32(1, "Floating point to unsigned integer intructions runtime cycles.")
     fptosi = Param.UInt32(1, "Floating point to signed integer intructions runtime cycles.")
     uitofp = Param.UInt32(1, "Unsigned integer to floating point intructions runtime cycles.")
+    sitofp = Param.UInt32(1, "Signed integer to floating point intructions runtime cycles.")
     ptrtoint = Param.UInt32(1, "Pointer to integer intructions runtime cycles.")
     inttoptr = Param.UInt32(1, "Integer to pointer intructions runtime cycles.")
     bitcast = Param.UInt32(1, "Bitcast intructions runtime cycles.")
@@ -37,8 +42,8 @@ class CycleCounts(SimObject):
     landingpad = Param.UInt32(1, "Landing pad intructions runtime cycles.")
     catchpad = Param.UInt32(1, "Catch pad intructions runtime cycles.")
     alloca = Param.UInt32(1, "Allocate intructions runtime cycles.")
-    load = Param.UInt32(0, "Must be 0, handled by memory controller");
-    store = Param.UInt32(0, "Must be 0, handled by memory controller");
+    load = Param.UInt32(0, "Must be 0, handled by memory controller")
+    store = Param.UInt32(0, "Must be 0, handled by memory controller")
     fence = Param.UInt32(1, "Fence intructions runtime cycles.")
     cmpxchg = Param.UInt32(1, "Compare and exchange intructions runtime cycles.")
     atomicrmw = Param.UInt32(1, "Atomic remove intructions runtime cycles.")
@@ -64,8 +69,4 @@ class CycleCounts(SimObject):
     fsub = Param.UInt32(5, "Floating point subtraction intructions runtime cycles.")
     fmul = Param.UInt32(4, "Floating point multiplication intructions runtime cycles.")
     fdiv = Param.UInt32(16, "Floating point division intructions runtime cycles.")
-    frem = Param.UInt32(5, "Floating point remainder intructions runtime cycles.")
-
-
-
-
+    frem = Param.UInt32(5, "Floating point remainder intructions runtime cycles.")

src/hwacc/HWInterface.py

@@ -0,0 +1,13 @@
+from m5.params import *
+from m5.proxy import *
+from m5.SimObject import SimObject
+from CycleCounts import CycleCounts
+from FunctionalUnits import FunctionalUnits
+from SALAMStatistics import SALAMStatistics
+from RuntimeParams import RuntimeParams
+
+class HardwareInterface(SimObject):
+    type = 'HardwareInterface'
+    cxx_header = "hwacc/hw_interface.hh"
+
+    cycle_counts = Param.CycleCounts(Parent.any, "Load instruction runtime cycle counts")

src/hwacc/HWModel/SimObjects/CycleCounts.py

@@ -0,0 +1,72 @@
+from m5.params import *
+from m5.proxy import *
+from m5.SimObject import SimObject
+
+#Instruction runtime cycles
+class CycleCounts(SimObject):
+    # SimObject type
+    type = "CycleCounts"
+
+    # gem5-SALAM attached header
+    cxx_header = "hwacc/LLVMRead/src/cycle_counts.hh"
+
+    # Instruction cycle count defaults
+    counter = Param.UInt32(1, "Counter intructions runtime cycles.")
+    gep = Param.UInt32(1, "GetElementPtr intructions runtime cycles.")
+    phi = Param.UInt32(1, "Phi intructions runtime cycles.")
+    select = Param.UInt32(1, "Select intructions runtime cycles.")
+    ret = Param.UInt32(1, "Return intructions runtime cycles.")
+    br = Param.UInt32(1, "Branch intructions runtime cycles.")
+    switch_inst = Param.UInt32(1, "Switch intructions runtime cycles.")
+    indirectbr = Param.UInt32(1, "Indirect Branch intructions runtime cycles.")
+    invoke = Param.UInt32(1, "Invoke intructions runtime cycles.")
+    resume = Param.UInt32(1, "Resume intructions runtime cycles.")
+    unreachable = Param.UInt32(1, "Unreachable intructions runtime cycles.")
+    icmp = Param.UInt32(1, "Integer compare intructions runtime cycles.")
+    fcmp = Param.UInt32(1, "Floating point compare intructions runtime cycles.")
+    trunc = Param.UInt32(1, "Truncate intructions runtime cycles.")
+    zext = Param.UInt32(1, "Zero extend intructions runtime cycles.")
+    sext = Param.UInt32(1, "Sign extend intructions runtime cycles.")
+    fptrunc = Param.UInt32(1, "Floating point truncate intructions runtime cycles.")
+    fpext = Param.UInt32(1, "Floating point extend intructions runtime cycles.")
+    fptoui = Param.UInt32(1, "Floating point to unsigned integer intructions runtime cycles.")
+    fptosi = Param.UInt32(1, "Floating point to signed integer intructions runtime cycles.")
+    uitofp = Param.UInt32(1, "Unsigned integer to floating point intructions runtime cycles.")
+    sitofp = Param.UInt32(1, "Signed integer to floating point intructions runtime cycles.")
+    ptrtoint = Param.UInt32(1, "Pointer to integer intructions runtime cycles.")
+    inttoptr = Param.UInt32(1, "Integer to pointer intructions runtime cycles.")
+    bitcast = Param.UInt32(1, "Bitcast intructions runtime cycles.")
+    addrspacecast = Param.UInt32(1, "Address space cast intructions runtime cycles.")
+    call = Param.UInt32(1, "Call intructions runtime cycles.")
+    vaarg = Param.UInt32(1, "Vaarg intructions runtime cycles.")
+    landingpad = Param.UInt32(1, "Landing pad intructions runtime cycles.")
+    catchpad = Param.UInt32(1, "Catch pad intructions runtime cycles.")
+    alloca = Param.UInt32(1, "Allocate intructions runtime cycles.")
+    load = Param.UInt32(0, "Must be 0, handled by memory controller")
+    store = Param.UInt32(0, "Must be 0, handled by memory controller")
+    fence = Param.UInt32(1, "Fence intructions runtime cycles.")
+    cmpxchg = Param.UInt32(1, "Compare and exchange intructions runtime cycles.")
+    atomicrmw = Param.UInt32(1, "Atomic remove intructions runtime cycles.")
+    extractvalue = Param.UInt32(1, "Extract value intructions runtime cycles.")
+    insertvalue = Param.UInt32(1, "Insert value intructions runtime cycles.")
+    extractelement = Param.UInt32(1, "Extract element intructions runtime cycles.")
+    insertelement = Param.UInt32(1, "Insert element intructions runtime cycles.")
+    shufflevector = Param.UInt32(1, "Shuffle vector intructions runtime cycles.")
+    shl = Param.UInt32(1, "Shift left intructions runtime cycles.")
+    lshr = Param.UInt32(1, "Logical shift right intructions runtime cycles.")
+    ashr = Param.UInt32(1, "Arithmetic shift right intructions runtime cycles.")
+    and_inst = Param.UInt32(1, "And intructions runtime cycles.")
+    or_inst = Param.UInt32(1, "Or intructions runtime cycles.")
+    xor_inst = Param.UInt32(1, "Xor intructions runtime cycles.")
+    add = Param.UInt32(1, "Integer add intructions runtime cycles.")
+    sub = Param.UInt32(1, "Integer subtract intructions runtime cycles.")
+    mul = Param.UInt32(1, "Integer multiply intructions runtime cycles.")
+    udiv = Param.UInt32(1, "Unsigned integer division intructions runtime cycles.")
+    sdiv = Param.UInt32(1, "Signed integer division intructions runtime cycles.")
+    urem = Param.UInt32(1, "Unsigned remainder intructions runtime cycles.")
+    srem = Param.UInt32(1, "Signed remainder intructions runtime cycles.")
+    fadd = Param.UInt32(5, "Floating point addition intructions runtime cycles.")
+    fsub = Param.UInt32(5, "Floating point subtraction intructions runtime cycles.")
+    fmul = Param.UInt32(4, "Floating point multiplication intructions runtime cycles.")
+    fdiv = Param.UInt32(16, "Floating point division intructions runtime cycles.")
+    frem = Param.UInt32(5, "Floating point remainder intructions runtime cycles.")

src/hwacc/HWModel/SimObjects/FunctionalUnits.py

@@ -0,0 +1,25 @@
+from m5.params import *
+from m5.proxy import *
+from m5.SimObject import SimObject
+from LLVMInstruction import LLVMInstruction
+
+class FunctionalUnits(SimObject):
+    type = 'FunctionalUnits'
+    cxx_header = "hwacc/HWModel/src/functional_unit.hh"
+
+    FU_counter = Param.Int32(-1, "Available counter functional units. -1 indicates unlimited resources")
+    FU_int_adder = Param.Int32(-1, "Available integer addition/subtraction functional units. -1 indicates unlimited resources")
+    FU_int_multiplier = Param.Int32(-1, "Available integer multiply/divide functional units. -1 indicates unlimited resources")
+    FU_int_shifter = Param.Int32(-1, "Available integer shifter functional units. -1 indicates unlimited resources")
+    FU_int_bit = Param.Int32(-1, "Available integer bitwise functional units. -1 indicates unlimited resources")
+    FU_fp_sp_adder = Param.Int32(-1, "Available floating point single precision addition/subtraction functional units. -1 indicates unlimited resources")
+    FU_fp_dp_adder = Param.Int32(-1, "Available floating point double precision addition/subtraction functional units. -1 indicates unlimited resources")
+    FU_fp_sp_multiplier = Param.Int32(-1, "Available floating point single precision multiply functional units. -1 indicates unlimited resources")
+    FU_fp_sp_divider = Param.Int32(-1, "Available floating point single precision divide functional units. -1 indicates unlimited resources")
+    FU_fp_dp_multiplier = Param.Int32(-1, "Available floating point double precision multiply functional units. -1 indicates unlimited resources")
+    FU_fp_dp_divider = Param.Int32(-1, "Available floating point single precision divide functional units. -1 indicates unlimited resources")
+    FU_compare = Param.Int32(-1, "Available comparison functional units. -1 indicates unlimited resources")
+    FU_GEP = Param.Int32(-1, "Available equivalent getelementptr functional units. -1 indicates unlimited resources")
+    FU_conversion = Param.Int32(-1, "Available type conversion functional units. -1 indicates unlimited resources")
+    FU_pipelined = Param.Int32(1, "Sets functional units to operate as pipelined (1) or not pipelined (0)")
+    FU_clock_period = Param.Int32(10, "Sets the transitor type used for power calculations")

src/hwacc/HWModel/SimObjects/LLVMInstruction.py

@@ -0,0 +1,70 @@
+from m5.params import *
+from m5.proxy import *
+from m5.SimObject import SimObject
+
+class LLVMInstruction(SimObject):
+    type = 'LLVMInstruction'
+    cxx_header = "hwacc/HWModel/src/functional_unit.hh"
+
+    # Custom Instructions
+    counter = Param.UInt32(0, "Counter operation.")
+
+    # LLVM Instructions
+    # Bool Param available? Or UInt1 or UInt8?
+    gep = Param.UInt32(0, "GetElementPtr operation.")
+    phi = Param.UInt32(0, "Phi operation.")
+    select = Param.UInt32(0, "Select operation.")
+    ret = Param.UInt32(0, "Return operation.")
+    br = Param.UInt32(0, "Branch operation.")
+    switch_inst = Param.UInt32(0, "Switch operation.")
+    indirectbr = Param.UInt32(0, "Indirect Branch operation.")
+    invoke = Param.UInt32(0, "Invoke operation.")
+    resume = Param.UInt32(0, "Resume operation.")
+    unreachable = Param.UInt32(0, "Unreachable operation.")
+    icmp = Param.UInt32(0, "Integer compare operation.")
+    fcmp = Param.UInt32(0, "Floating point compare operation.")
+    trunc = Param.UInt32(0, "Truncate operation.")
+    zext = Param.UInt32(0, "Zero extend operation.")
+    sext = Param.UInt32(0, "Sign extend operation.")
+    fptrunc = Param.UInt32(0, "Floating point truncate operation.")
+    fpext = Param.UInt32(0, "Floating point extend operation.")
+    fptoui = Param.UInt32(0, "Floating point to unsigned integer operation.")
+    fptosi = Param.UInt32(0, "Floating point to signed integer operation.")
+    uitofp = Param.UInt32(0, "Unsigned integer to floating point operation.")
+    ptrtoint = Param.UInt32(0, "Pointer to integer operation.")
+    inttoptr = Param.UInt32(0, "Integer to pointer operation.")
+    bitcast = Param.UInt32(0, "Bitcast operation.")
+    addrspacecast = Param.UInt32(0, "Address space cast operation.")
+    call = Param.UInt32(0, "Call operation.")
+    vaarg = Param.UInt32(0, "Vaarg operation.")
+    landingpad = Param.UInt32(0, "Landing pad operation.")
+    catchpad = Param.UInt32(0, "Catch pad operation.")
+    alloca = Param.UInt32(0, "Allocate operation.")
+    load = Param.UInt32(0, "Must be 0, handled by memory controller")
+    store = Param.UInt32(0, "Must be 0, handled by memory controller")
+    fence = Param.UInt32(0, "Fence operation.")
+    cmpxchg = Param.UInt32(0, "Compare and exchange operation.")
+    atomicrmw = Param.UInt32(0, "Atomic remove operation.")
+    extractvalue = Param.UInt32(0, "Extract value operation.")
+    insertvalue = Param.UInt32(0, "Insert value operation.")
+    extractelement = Param.UInt32(0, "Extract element operation.")
+    insertelement = Param.UInt32(0, "Insert element operation.")
+    shufflevector = Param.UInt32(0, "Shuffle vector operation.")
+    shl = Param.UInt32(0, "Shift left operation.")
+    lshr = Param.UInt32(0, "Logical shift right operation.")
+    ashr = Param.UInt32(0, "Arithmetic shift right operation.")
+    and_inst = Param.UInt32(0, "And operation.")
+    or_inst = Param.UInt32(0, "Or operation.")
+    xor_inst = Param.UInt32(0, "Xor operation.")
+    add = Param.UInt32(0, "Integer add operation.")
+    sub = Param.UInt32(0, "Integer subtract operation.")
+    mul = Param.UInt32(0, "Integer multiply operation.")
+    udiv = Param.UInt32(0, "Unsigned integer division operation.")
+    sdiv = Param.UInt32(0, "Signed integer division operation.")
+    urem = Param.UInt32(0, "Unsigned remainder operation.")
+    srem = Param.UInt32(0, "Signed remainder operation.")
+    fadd = Param.UInt32(0, "Floating point addition operation.")
+    fsub = Param.UInt32(0, "Floating point subtraction operation.")
+    fmul = Param.UInt32(0, "Floating point multiplication operation.")
+    fdiv = Param.UInt32(0, "Floating point division operation.")
+    frem = Param.UInt32(0, "Floating point remainder operation.")

src/hwacc/HWModel/SimObjects/RuntimeParams.py

@@ -0,0 +1,7 @@
+
+
+
+
+
+class RuntimeParams():
+    # Runtime params

src/hwacc/HWModel/SimObjects/SALAMStatistics.py

@@ -0,0 +1,6 @@
+
+
+
+
+class SALAMStatistics():
+    # Define what statistics to do 

src/hwacc/HWModel/src/cacti_wrapper.cc

@@ -0,0 +1,123 @@
+
+uca_org_t cactiWrapper(unsigned num_of_bytes, unsigned wordsize, unsigned num_ports, int cache_type) {
+  int cache_size = num_of_bytes;
+  int line_size = wordsize;  // in bytes
+  if (wordsize < 4)          // minimum line size in cacti is 32-bit/4-byte
+    line_size = 4;
+  if (cache_size / line_size < 64)
+    cache_size = line_size * 64;  // minimum scratchpad size: 64 words
+  int associativity = 1;
+  int rw_ports = num_ports;
+  if (rw_ports == 0)
+    rw_ports = 1;
+  int excl_read_ports = 0;
+  int excl_write_ports = 0;
+  int single_ended_read_ports = 0;
+  int search_ports = 0;
+  int banks = 1;
+  double tech_node = 40;  // in nm
+  //# following three parameters are meaningful only for main memories
+  int page_sz = 0;
+  int burst_length = 8;
+  int pre_width = 8;
+  int output_width = wordsize * 8;
+  //# to model special structure like branch target buffers, directory, etc.
+  //# change the tag size parameter
+  //# if you want cacti to calculate the tagbits, set the tag size to "default"
+  int specific_tag = false;
+  int tag_width = 0;
+  int access_mode = 2;  // 0 normal, 1 seq, 2 fast
+  int cache = cache_type;   // scratch ram 0 or cache 1
+  int main_mem = 0;
+  // assign weights for CACTI optimizations
+  int obj_func_delay = 0;
+  int obj_func_dynamic_power = 0;
+  int obj_func_leakage_power = 100;
+  int obj_func_area = 0;
+  int obj_func_cycle_time = 0;
+  // from CACTI example config...
+  int dev_func_delay = 20;
+  int dev_func_dynamic_power = 100000;
+  int dev_func_leakage_power = 100000;
+  int dev_func_area = 1000000;
+  int dev_func_cycle_time = 1000000;
+
+  int ed_ed2_none = 2;  // 0 - ED, 1 - ED^2, 2 - use weight and deviate
+  int temp = 300;
+  int wt = 0;  // 0 - default(search across everything), 1 - global, 2 - 5%
+               // delay penalty, 3 - 10%, 4 - 20 %, 5 - 30%, 6 - low-swing
+  int data_arr_ram_cell_tech_flavor_in =
+      0;  // 0(itrs-hp) 1-itrs-lstp(low standby power)
+  int data_arr_peri_global_tech_flavor_in = 0;  // 0(itrs-hp)
+  int tag_arr_ram_cell_tech_flavor_in = 0;      // itrs-hp
+  int tag_arr_peri_global_tech_flavor_in = 0;   // itrs-hp
+  int interconnect_projection_type_in = 1;      // 0 - aggressive, 1 - normal
+  int wire_inside_mat_type_in = 1;   // 2 - global, 0 - local, 1 - semi-global
+  int wire_outside_mat_type_in = 1;  // 2 - global
+  int REPEATERS_IN_HTREE_SEGMENTS_in =
+      1;  // TODO for now only wires with repeaters are supported
+  int VERTICAL_HTREE_WIRES_OVER_THE_ARRAY_in = 0;
+  int BROADCAST_ADDR_DATAIN_OVER_VERTICAL_HTREES_in = 0;
+  int force_wiretype = 1;
+  int wiretype = 30;
+  int force_config = 0;
+  int ndwl = 1;
+  int ndbl = 1;
+  int nspd = 0;
+  int ndcm = 1;
+  int ndsam1 = 0;
+  int ndsam2 = 0;
+  int ecc = 0;
+  return cacti_interface(cache_size,
+                         line_size,
+                         associativity,
+                         rw_ports,
+                         excl_read_ports,
+                         excl_write_ports,
+                         single_ended_read_ports,
+                         search_ports,
+                         banks,
+                         tech_node,  // in nm
+                         output_width,
+                         specific_tag,
+                         tag_width,
+                         access_mode,  // 0 normal, 1 seq, 2 fast
+                         cache,        // scratch ram or cache
+                         main_mem,
+                         obj_func_delay,
+                         obj_func_dynamic_power,
+                         obj_func_leakage_power,
+                         obj_func_cycle_time,
+                         obj_func_area,
+                         dev_func_delay,
+                         dev_func_dynamic_power,
+                         dev_func_leakage_power,
+                         dev_func_area,
+                         dev_func_cycle_time,
+                         ed_ed2_none,
+                         temp,
+                         wt,
+                         data_arr_ram_cell_tech_flavor_in,
+                         data_arr_peri_global_tech_flavor_in,
+                         tag_arr_ram_cell_tech_flavor_in,
+                         tag_arr_peri_global_tech_flavor_in,
+                         interconnect_projection_type_in,
+                         wire_inside_mat_type_in,
+                         wire_outside_mat_type_in,
+                         REPEATERS_IN_HTREE_SEGMENTS_in,
+                         VERTICAL_HTREE_WIRES_OVER_THE_ARRAY_in,
+                         BROADCAST_ADDR_DATAIN_OVER_VERTICAL_HTREES_in,
+                         page_sz,
+                         burst_length,
+                         pre_width,
+                         force_wiretype,
+                         wiretype,
+                         force_config,
+                         ndwl,
+                         ndbl,
+                         nspd,
+                         ndcm,
+                         ndsam1,
+                         ndsam2,
+                         ecc);
+}